IS2023S_Datasheet(IS2023S规格书)
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Bluetooth v4.1 Stereo Solution with Digital Audio Output
GENERAL DESCRIPTION
The IS2023S is a compact, highly integrated, ultra-low cost, CMOS single-chip RF and baseband IC for preliminary Bluetooth v4.1 2.4GHz applications. This chip is fully compliant with Bluetooth specification and completely ? Soundbar
?
Portable speakerphone
FEATURES
? Support preliminary Bluetooth v4.1 function. ?
Bluetooth Profiles - HFP v1.6 - HSP v1.1
Bluetooth v4.1 Stereo Solution with Digital Audio Output
Table of Contents
1OVERVIEW (3)
2PIN ASSIGNMENTS (6)
3RADIO TRANSCEIVER (9)
4MICROPROCESSOR (11)
5AUDIO (12)
6POWER MANAGEMENT UNIT (13)
7VOICE PROMPT (15)
8REFERENCE CLOCK (16)
9SPECIFICATIONS (17)
10PACKAGE (29)
11BLUETOOTH CERTIFICATIONS (32)
12REFLOW PROFILES (33)
1 Overview
The IS2023S is a stereo ROM version IC for Bluetooth v4.1 2.4GHz applications. It incorporates a stand-alone baseband processor and an integrated 2.4GHz transceiver. The IS2023S is designed to support high quality voice application; an audio engine and a
?Combined TX/RX RF terminal simplifies external matching and reduces external antenna switches.
?Max. +4dBm output power with 20 dB level control from register control.
?Built-in T/R switch for Class 2/3 application
?To avoid temperature variation, temperature sensor with temperature calibration is utilized into bias current and gain control.
?Fully integrated synthesizer has been created. There requires no external VCO, varactor diode, resonator and loop filter.
?Crystal oscillation with built-in digital trimming for temperature/process variations.
Audio processor
?Support 64 kb/s A-Law or μ-Law PCM format, or CVSD (Continuous Variable Slope Delta Modulation) for SCO channel operation.
?Noise suppression
?Enhanced Echo cancellation
?SBC/AAC decoding
?Packet loss concealment
Audio codec
?16 bits stereo codec
Digital audio interface
?Support 8K, 44.1K,48K sampling rate
?16bits/24bits PCM and I2S output
Peripherals
?Built-in 350mA Lithium-ion battery charger
?Integrate LDO and Switching regulator
?Built-in ADC for battery monitor and voltage sensing.
? 2 LED drivers
?I2C interface
Flexible HCI interface
?High speed HCI-UART (Universal Asynchronous Receiver Transmitter) interface Package
?7x7mm2 QFN56 standard package
2 PIN ASSIGNMENTS
3 RADIO TRANSCEIVER
IS2023S is designed optimized for the Bluetooth usage in 2.4 GHz system. It provides low-power, low-cost with high receiving sensitivity and high transmitting power that extend the effective communication range. It is fully compliant with the Bluetooth Radio and EDR specifications.
TRANSMITTER
The internal PA has a maximum output power of +4dBm with level control 20dB from amplitude control. This is applied into Class2/3 radios without external PA. For Class1 application, the external PA must be used.
The transmitter features IQ direct conversion to minimize the frequency drift. And it can excess 20dB power range with temperature compensation machine.
RECEVIER
The LNA can be operated into two type modes. One type is TR-combined mode for single port application. The other type is TR-separated mode for dual port application that uses an external PA/LNA application.
The ADC is utilized to sample input analogue wave to convert into digital for de-modulator analysis. Before the ADC, a channel filter has been integrated into receiver channel that can reduce the external component and increase the anti-interference capability.
The image rejection filter is to reject image frequency for low-IF architecture. This filter for low-IF architecture is implied to reduce external BPF component for super heterodyne architecture.
There is a RSSI signal to the processor that can control the power and also make a good tradeoff between effective distance and current consumption.
SYNTHESIZER
A synthesizer generates a clock for radio transceiver operation. There is a VCO inside with tunable internal LC tank. It can reduce variation for components. A crystal oscillation with internal digital trimming circuit provides a stable clock for synthesizer.
4 MICROPROCESSOR
A single-cycle 8-bit MCU is inside IS2023S to carry out the required Bluetooth protocols. It can run at the range from 16MHz to 48MHz so that MCU firmware can dynamically consider the tradeoff between computing speed and power consumption. MCU firmware is implemented in ROM (Read-Only-Memory) to minimize the power consumption of program execution and to save the cost of external flash.
EXTERNAL RESET
A watchdog timer is capable of reset the chip. It has an integrated Power-On Reset (POR) circuit that resets all circuits to a known power-on state. This action can also be driven by an external reset signal that can be used to externally control the device, forcing it into a power-on reset state. The RST_N signal input is low active and no connection is required in most applications.
5 AUDIO
AUDIO PROCESSOR
The audio processor is a 16/32 bit run time configurable fixed point DSP core with hardware accelerator. The maximum 72 MIPS single cycle 16-bit/32-bit data computing provides the combination of performance and power, memory saving. The standard
A-law/ -law/CVSD voice function and SBC/AAC A2DP audio are implemented in the firmware. The enhanced audio functions, like AEC, noise reduction, and packet loss concealment can also be achieved with enhanced algorithm.
AUDIO CODEC
ADC
The ADC interface is a mono microphone inputs. The microphone input has 46 dB programmable analog gain and 54dB digital gain. A regulated MIC_Bias is available
DAC
The DAC output is available for both line level and through the headphone amplifier to drive a low impedance headphone. The headphone output volume is adjustable by the combination of the digital/analog gain control. For the common single-end audio output requirement, a three-wire capacitor-less headphone output stage can be chosen.
Digital Audio Output
IS2023 support I2S and PCM two types digital audio interface. For more details, please see the application note.
6 POWER MANAGEMENT UNIT
The PMU inside the chip support below features: charging Li-ion battery, voltage monitoring, LDO, switching regulator and LED drivers.
programmable and stored in the EEPROM. This ADC provides a good resolution that MCU can control the charging process.
LDO
The built-in LDO is used to convert the battery or adaptor power for power supply. It also integrates hardware architecture to control power on/off procedure. The built-in programmable LDOs provide power for codec and digital IO pads. It is used to buffer the high input voltage from battery or adapter. This LDO needs 1uF bypass capacitor.
SWITCHING REGULATOR
The built-in programmable output voltage regulator can convert battery voltage for RF and baseband core power supply. This converter has high conversion efficiency and fast transient response.
7 Voice prompt
IS2023S provides English/Chinese/Spanish/French voice prompt. For more details, please see the application note.
8 REFERENCE CLOCK
IS2023S is composed of an integrated crystal oscillation function. It used a 16MHz external crystal and two specified load capacitors, providing high quality clock source for
9 SPECIFICATIONS
LED 4.3V
Power switch 1.8V 7.0V Table 3: BUCK switching regulator