74ACT273MTR,74ACT273TTR,74ACT273TTR,74ACT273TTR,74ACT273B, 规格书,Datasheet 资料

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April 2001s

HIGH SPEED:

f MAX = 190MHz (TYP.) at V CC = 5V s

LOW POWER DISSIPATION:I CC = 4 μA (MAX.) at T A =25°C

COMPATIBLE WITH TTL OUTPUTS V IH = 2V (MIN.), V IL = 0.8V (MAX.)s

50? TRANSMISSION LINE DRIVING CAPABILITY

SYMMETRICAL OUTPUT IMPEDANCE:|I OH | = I OL = 24mA (MIN)

BALANCED PROPAGATION DELAYS:t PLH ? t PHL

OPERATING VOLTAGE RANGE:V CC (OPR) = 4.5V to 5.5V

PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 273

IMPROVED LATCH-UP IMMUNITY

DESCRIPTION

The 74ACT273 is an advanced high-speed CMOS OCTAL D-TYPE FLIP FLOP WITH CLEAR fabricated with sub-micron silicon gate and double-layer metal wiring C 2MOS technology. Information signals applied to D inputs are transfered to the Q output on the positive-going edge of the clock pulse.

When the CLEAR input is held low, the Q outputs

are held low independentely of the other inputs. The device is designed to interface directly High Speed CMOS systems with TTL, NMOS and CMOS output voltage levels.

All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.

74ACT273

OCTAL D-TYPE FLIP FLOP WITH CLEAR

PIN CONNECTION AND IEC LOGIC SYMBOLS

ORDER CODES

PACKAGE TUBE T & R

DIP 74ACT273B SOP 74ACT273M

74ACT273MTR

TSSOP

74ACT273TTR

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INPUT AND OUTPUT EQUIVALENT CIRCUIT

PIN DESCRIPTION

TRUTH TABLE

LOGIC DIAGRAM

This logic diagram has not be used to estimate propagation delays

PIN No SYMBOL NAME AND FUNCTION 1CLEAR Asyncronous Master Reset (Active LOW)

2, 5, 6, 9, 12, 15, 16,19Q0 to Q7Flip-Flop Outputs 3, 4, 7, 8, 13, 14, 17, 18

D0 to D7Data Inputs

CLOCK Clock Input (LOW-to-HIGH Edge Triggered)10GND Ground (0V)

V CC

Positive Supply Voltage

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ABSOLUTE MAXIMUM RATINGS

Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied.

RECOMMENDED OPERATING CONDITIONS

1) V IN from 0.8V to 2.0V

Symbol Parameter

Value Unit V CC Supply Voltage -0.5 to +7V V I DC Input Voltage -0.5 to V CC + 0.5V V O DC Output Voltage -0.5 to V CC + 0.5

V I IK DC Input Diode Current ± 20mA I OK DC Output Diode Current ± 20mA I O DC Output Current ± 50mA I CC or I GND DC V CC or Ground Current

± 400mA T stg Storage Temperature -65 to +150

°C T L

Lead Temperature (10 sec)

300

°C

Symbol Parameter

Value Unit

V CC Supply Voltage 4.5 to 5.5V V I Input Voltage 0 to V CC

V V O Output Voltage 0 to V CC

V T op Operating Temperature

-55 to 125

°C

dt/dv

Input Rise and Fall Time V CC = 4.5 to 5.5V (note 1)

ns/V

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DC SPECIFICATIONS

1) Maximum test duration 2ms, one output loaded at time

2) Incident wave switching is guaranteed on transmission lines with impedances as low as 50?

AC ELECTRICAL CHARACTERISTICS (C L = 50 pF, R L = 500 ?, Input t r = t f = 3ns)

(*) Voltage range is 5.0V ± 0.5V

Symbol

Parameter

Test Condition

Value Unit

V CC (V)T A = 25°C -40 to 85°C -55 to 125°C Min.Typ.Max.

Min.Max.

V IH High Level Input Voltage

4.5V O = 0.1 V or V CC -0.1V 2.0 1.5 2.0 2.0V

5.5 2.0

1.5

2.0

V IL Low Level Input Voltage

4.5V O = 0.1 V or V CC -0.1V 1.50.80.80.8

5.5 1.50.8

0.8

V OH

High Level Output Voltage

4.5I O =-50 μA 4.4 4.49 4.4 4.4

5.5I O =-50 μA 5.4 5.49

5.4 5.44.5I O =-24 mA 3.86 3.76 3.7V

5.5

I O =-24 mA 4.86

4.76

4.7

V OL

Low Level Output Voltage

4.5I O =50 μA 0.0010.10.10.1

5.5I O =50 μA 0.001

0.10.10.14.5I O =24 mA 0.360.440.55.5

I O =24 mA 0.360.440.5

I I Input Leakage Cur-rent

5.5V I = V CC or GND ± 0.1

± 1

μA

I CCT Max I CC /Input 5.5V I = V CC - 2.1V 0.6

1.5 1.6mA I CC Quiescent Supply Current

5.5V I = V CC or GND 4

4080μA I OLD Dynamic Output Current (note 1, 2)

5.5

V OLD = 1.65 V max 7550

mA I OHD

V OHD = 3.85 V min

-75

-50

Symbol Parameter

Test Condition

Value

Unit

V CC

(V)T A = 25°C -40 to 85°C -55 to 125°C Min.Typ.Max.Min.Max.Min.Max.t PLH t PHL Propagation Delay

Time CLOCK to Y

5.0(*) 1.5 4.08.5 1.59.0 1.59.0ns t PHL Propagation Delay

Time CLEAR to Y

5.0(*) 1.5

4.59.0 1.5

9.5 1.5

9.5ns t WL CLEAR Pulse

Width

5.0(*) 2.3 4.0 4.0 4.0ns t W CLOCK Pulse

Width

5.0(*) 1.8 4.0 4.0 4.0ns t s Setup Time D to

CLOCK, HIGH or LOW

5.0(*) 1.0

3.5

t h Hold Time D to

CLOCK, HIGH or LOW

5.0(*)-0.5 1.5 1.5 1.5ns t REM

Recovery Time CLEAR to CLOCK

5.0(*)0.5

3.0

ns f MAX Maximum CLOCK

Frequency

5.0(*)

125

190

110

MHz

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CAPACITIVE CHARACTERISTICS

PD load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I CC(opr) = C PD x V CC x f IN + I CC /n (per circuit)

TEST CIRCUIT

C L = 50pF or equivalent (includes jig and probe capacitance)R L = R 1 = 500? or equivalent

R T = Z OUT of pulse generator (typically 50?)

Symbol

Parameter

Test Condition

Value Unit

V CC (V)T A = 25°C -40 to 85°C -55 to 125°C Min.

Typ.Max.

Min.

Max.

Min.

Max.

C IN Input Capacitance 5.04pF C PD

Power Dissipation Capacitance (note 1)

5.0

f IN = 10MHz

74ACT273

WAVEFORM 1: PROPAGATION DELAYS, SETUP AND HOLD TIMES (f=1MHz; 50% duty cycle)

WAVEFORM 2: PROPAGATION DELAYS (f=1MHz; 50% duty cycle)

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WAVEFORM 3: RECOVERY TIME (f=1MHz; 50% duty cycle)

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