MxL603_Datasheet_Rev0_1_15Nov11

M AX L INEAR

M X L603D IGITAL C ABLE &T ERRESTRIAL S ILICON T UNER

G ENERAL D ESCRIPTION

MxL603 is a highly integrated, low-power

silicon tuner IC targeting all global digital

cable and terrestrial standards. The high

performance MxL603 is fully compliant with

MxL603

44MHz

input

channel

chip,

The

external

MxL603 is available in a 4 x 4 mm2 24-pin QFN

package.

Applications

Digital terrestrial receivers such as STBs,

PVRs and media gateways

Digital cable applications such as STBs,

cable modems, EMTAs, and cable DTAs

F EATURES

Tuning range from 44MHz to 1002MHz

Integrated channel filtering requiring no

external SAW filter

Programmable channel bandwidths of 6, 7,

with 3.3V and

enables single

and IF

additional tuners in

to LTE and WiFi

output GPO

Standards Supported

MxL603 is compliant to the following

DOCSIS 3.0, 2.0

EURODOCSIS 3.0, 2.0

ITU-T J.83

Annex A (DVB-C)

Annex B (US Cable)

Annex C (Japan)

DVB-T & DVB-T2 (Nordig 2.2, DTG 6.2.1)

ATSC & ATSC M/H

ISDB-T 13-Segment

SBTVD-T (Brazil)

DTMB (China)

Pin Configuration

L T _O U T

L T _A C _G N D

X T A L _P X T A L _N V D D _3p 3

V D D _1p 8

IF Out

Figure 1. MxL603 IC Block diagram

Pin Description Pin Names

Description

Differential RF inputs; differential input impedance of

Single-ended Loop-Through output (See Appendix 3 I2

Supply and Ground

Analog and Digital I/O

Specifications Absolute Maximum Ratings

Digital IO Specifications

Tuner General Specifications

All specifications apply to conditions defined in Operating Conditions, measured at IF = 6.0 MHz and across RF frequency range with balun attached in front of the RF inputs.

Digital Cable Mode Specifications

Input Return Loss 75 system

Digital Terrestrial Mode Specifications

(Only differences between this mode and digital cable mode are listed)

need to be added to the above values

Crystal Requirements

Only fundamental mode crystals are supported. The default crystal frequency used is 16 MHz.

Supply Voltage Ramp-Up Rules

This chip is designed to support arbitrary power-up sequence for the three power supplies as illustrated in Figure 2. The three supplies can be power-up in arbitrary order. The only requirement is to keep RESET_N low during the power-up. The RESET_N signal can be released after all voltage supplies have been stable for at least 10μs. (T1≥ 10μs)

is 10us.

Operating Modes(See Appendix 5)

Upon reset On-chip digital regulator is on Xtal oscillator and clock out are on I2C is active

RF section is inactive

Loop-Through not included

I2C control On-chip digital regulator is on Xtal oscillator and clock out are on I2C is active

Loop-Through not included

I2C control Tuner fully operational in digital terrestrial mode

Loop-Through not included

Note: Loop-Through can be ON or OFF for all operation modes. When Loop-Through is ON,

Packaging

QFN24 package dimensions: 4x4x0.85 mm3. Thermal resistance (Junction to ambient) is 43 o C/W.

Appendix

1.Hardware configuration and resistor tolerance requirement for AS pin

a. 16MHz(ABLS2-16.000MHz-D4Y-T) crysta l from crystal manufacturer “Abracon” is used

b. On-chip crystal loading capacitors is programmed to 25 pF

3.Hardware configuration for Loop-Through

5. Operating Modes Control

MxL603 supports 3 operating modes. (Sleep, Standby, Active) After reset signal is asserted, MxL603 will be in sleep mode. All the registers will be in default value. After certain tuning sequence (channel frequency, BW, IF etc.), MxL603 will operate in active mode. In order to save power while not in use, users can program MxL603 into standby mode; in this mode, all the registers will be stored from active mode and unnecessary blocks will be shut off. During the switch of active and standby mode, clock output will have no disturbance and GPO status will remain the same.

Revision History

Rev 0.1, Nov 11, 2011

1. Release of MxL603 preliminary datasheet