高适应性的混合直流换流器Hybrid DC Converter with Wide ZVS Range

Hybrid DC Converter with Wide ZVS Range Bor-Ren Lin, Senior Member, IEEE, and Kuan-Hao Chen

Department of Electrical Engineering

National Yunlin University of Science and Technology, Yunlin 640, Taiwan

Abstract–This paper presents a new soft switching dc-dc converter including a three-level pulse-width modulation (PMW) converter and a series resonant converter with same active switches to extend zero voltage switching (ZVS) range and to reduce circulating current losses on the primary side during freewheeling intervals. The phase-shift PWM scheme is adopted to generate the properly gating signals for active switches in three-level converter and regulate output voltage at the designed voltage level. Series resonant converter with fixed switching frequency is adopted to extend the ZVS range of active switches at lagging leg. The circulating current losses in three-level converter are reduced by parallel connection of output sides of three-level converter and series resonant converter. In order to reduce the circulating current losses in series resonant converter, the switching frequency is higher than the series resonant frequency. Thus, the circulating losses in three-level converter and series resonant converter are all improved. The circuit efficiency of the proposed converter is improved. Finally, experiments with a 1.44k W prototype circuit are provided to verify the effectiveness of the proposed converter.

Index Terms—Soft switching dc-dc converter, full-bridge converter, series resonant converter, zero voltage switching.

I.I NTRODUCTION

Medium or high power ac-dc converters with high power density and high efficiency have been proposed and used in industry switching mode power supplies and plug-in hybrid electric vehicle battery chargers [1]-[2]. In order to meet the power quality demands, single-phase or three-phase bridge/bridgeless power factor correctors (PFC) with boost voltage type have been proposed. Thus, a stable dc bus voltage with V dc=500V-800V is provided by a three-phase PFC. Three-level dc-dc converters [3]-[5] with low voltage stress of active switches are widely adopted in industry applications. Phase-shift pulse-width modulation (PWM) is normally used to generate the gate singles of three-level converters. However, active switches at lagging leg are more difficult to achieve zero voltage switching (ZVS) at light load due to the limited energy stored in primary leakage inductance. If the primary leakage inductance is increased [6] or external resonant inductance [1] is added on the primary side, the ZVS range can be improved but the duty cycle loss in freewheeling intervals is also increased that will decrease the effective duty cycle on the secondary side. The more secondary winding turns are needed and it will increase the copper losses of transformer, voltage rating of rectifier diodes and conduction losses of active switches. Auxiliary circuits added on the primary side have been proposed in [7]-[9] to extend the ZVS range. The switching power loss of active switches is reduced but the power losses of additional auxiliary circuits are increased. In [10]-[11], LLC converter and full-bridge converter share active switches at lagging leg to extend the ZVS range of lagging leg from light load to full load. The circulating current losses on the primary side during freewheeling intervals are the other main issue in conventional three-level converter. The high circulating current will increase circuit conduction losses on active switches and transformer windings and decrease circuit efficiency. The active and passive clamp circuits [2] and [12] are adopted at the secondary side to limit voltage overshoots and oscillations across the output diodes when they are turned off and to improve the circulating current losses on the primary side. This paper presents a hybrid three-level ZVS converter including a phase-shift PWM converter and a resonant converter with fixed switching frequency to achieve the functions of wide range of ZVS turn-on for lagging-switch, low circulating current losses and high circuit efficiency. Half-bridge LLC resonant converter shares the same active switches at lagging leg in the conventional three-level PWM converter. Since the LLC converter is operated at f sw (switching frequency) > f r (series resonant frequency), the active switches can be turned on under ZVS from zero to full load with low circulating current losses. The ZVS range of lagging-leg switches can be extended from zero to full load. The leakage inductance or external inductance in three-level converter can be reduced to decrease duty cycle losses and the circulating current during freewheeling intervals. The output sides of LLC converter and three-level PWM converter are connected in parallel with a clamp diode. When the primary voltage of three-level converter is positive or negative, the output power is delivered from input to output through three-level converter. However, the output power is transferred from input to output through LLC converter when three-level converter is operated at freewheeling interval. Thus, three-level converter and LLC converter transfer energy from input to output within the switching cycle to achieve more effective energy transfer. The circulating current of three-level converter during the freewheeling interval can be reduced due to the clamp diode. Finally, the effectiveness of the proposed converter is verified

k

W prototype circuit.

V

o

v

current

v S1v S2v S3v S4

(b)

Fig. 1. Conventional three-level converter (a) circuit configuration (b) key waveforms.

(a)

(b)

Fig. 2. Conventional three-level converter with passive snubber (a) circuit configuration (b) key waveforms.

C

R2

o

(a)

(b)

(c)

Fig. 3. Conventional LLC converter (a) circuit configuration (b) operating at f s f r ..

II. C IRCUIT C ONFIGURATION AND O PERATION P RINCIPLES A. Circuit Configuration

Fig. 1 shows the circuit diagram of the conventional three-level ZVS converter with phase-shift PWM scheme. There is a serious circulating current during the freewheeling interval (v ab =0). No power is transferred from input to output at

freewheeling interval. Thus, the circulating current will increase the conduction losses on active switches and transformer windings and decrease the circuit efficiency especially at high input voltage and full load. Low cost passive

snubber as shown in Fig. 2 is normally adopted on the secondary side to limit the voltage overshoots and oscillations across the rectifier diodes and to reduce the circulating current. The clamp capacitor C a is operated as a constant dc voltage in

steady state. When three-level converter is operated at freewheeling interval, the clamp capacitor voltage V Ca can help to decrease the primary current and reduce the conduction losses on active switches. Fig. 3 shows the conventional half-bridge LLC converter with two different operation conditions (f sw f r ). It is clear that the LLC converter has higher circulating current when the switching frequency is less than

Fig. 4. Circuit configuration of the proposed hybrid three-level ZVS converter.

The circuit diagram of the proposed hybrid three-level converter is shown in Fig. 4. The proposed converter is composed of a three-level PWM converter and a LLC converter with a fixed switching frequency. Phase-shift PWM scheme is adopted to regulate output voltage against the input voltage and load current variations and to generate the proper gating voltages for active switches S 1-S 4. LLC converter is operated at the fixed switching frequency with 0.5 duty cycle of S 2 and S 3. Thus, the output voltage of LLC converter v LLC is an uncontrolled voltage. Since the selected switching frequency f sw is higher than the series resonant frequency f r in LLC converter, the lagging-leg switches S 2 and S 3 can be turned on under ZVS from light to full load to improve the drawback of conventional three-level converter. In the meantime, the necessary primary inductance L r 1 can be reduced and the duty cycle loss due to large L r 1 is also improved. The effective duty cycle on the secondary side is increased. The ZVS range of leading-leg switches S 1 and S 4 is depended on the energy stored in the output inductance L o . The clamp diode D b is connected between two outputs of LLC converter and three-level converter. Clamp diode D b is conducting during the freewheeling interval to transfer energy from LLC output v LLC to three-level output v o . Thus, the rectified voltage v r is equal to v LLC . The reflected voltage n 1v r is applied to L r 1 to decrease the circulating current to zero at

the freewheeling interval. In the meantime, the voltage across output inductor is equal to v LLC -v o instead of -v o so that the output inductance in the proposed hybrid converter can be reduced.

S 1S 2S 3S 4v

v i i i i i in /2

Fig. 5. Key waveforms of the proposed converter during half switching cycle.

B. Operation Principles

The duty cycle of active switches S 1-S 4 is equal to 0.5. MOSFETs S 1-S 4 and rectifier diodes D R 1-D R 4, D 1-D 2 and D b are assumed ideal. Voltages across C d 1, C d 2, C f , C o,LLC and C o are assumed constant. Turns ratios of T 1 and T 2 are n 1=n p 1/n s 1=n p 1/n s 2 and n 2=n p 2/n s 3=n p 2/n s 4, respectively. C 1=C 2=C 3=C 4=C oss and V Cd1=V Cd2=V Cf =V in /2. Fig. 5 shows the theoretical key waveforms of the proposed hybrid converter in a switching period. Based on the on/off states of S 1-S 4, D R 1-D R 4, D 1-D 2 and D b , there are six topological stages during each half switching period. The equivalent operation circuits for different topological stages are shown in Fig. 6. Prior to t 0, MOSFETs S 1 and S 2 and the rectifier diodes D R 1 and D R 3 are conducting. Inductor currents i Lr1 and i Lr2 are all positive.

Stage 1 [t 0 - t 1]: Switch S 1 is turned off at time t 0. i Lr1 and i Lr2 start to charge C 1 and discharge C 4 via capacitor C f . The ZVS condition of S 4 is given as:

2

)()()(20

2

22021211in

oss Lr r Lr o r V C t i L t i L n L ≥++ (1)

The energy stored in L o is reflected to the primary side to discharge C 4. Thus, the ZVS condition of S 4 is easily achieved. This stage ends at t 1 when v C 1=V in /2 and v C 4=0. The time interval of stage 1 is given as:

max

,21max ,02010101/)()(Lr Lo in

oss Lr Lr in oss i n i V C t i t i V C t t t +≈+=?=Δ (2)

To ensure the ZVS operation of S 4, the dead time between S 1 and S 4 should be greater than Δt 01.

Stage 2 [t 1 - t 2]: This stage starts at t 1 when v C 1=V in /2, v C 4=0, and D 1 is conducting. The ac terminal voltages v ab =0 and v ac =v Cf =V in /2. Thus, the clamp diode D b is conducting and the inductor voltage v Lo =V LLC -V o <0. The inductor current i Lo decreases with the slope of (V LLC -V o )/L o in this stage. The reflected secondary windings voltage -n 1V LLC is applied to L r 1 so that i Lr 1 decreases with the slope of -n 1V LLC /L r 1. In

conventional three-level converter, the primary current i Lr 1 is still keeping at high current value so that the circulating current losses are serious in the freewheeling interval. In the proposed converter, the primary side current of three-level converter can be decreased to zero very quickly due to apply a negative voltage -n 1V LLC to inductor L r 1. Thus, the circulating current can be rapidly reduced at the beginning of the freewheeling interval. In this stage, the energy stored in C o,LLC is transferred to output load through D b and L o , i a decreases, and i b increases. At the same time, LLC converter is in the

o,LLC

.

Fig. 6. Operation stages of the proposed converter in a half switching cycle (a) stage 1 (b) stage 2 (c) stage 3 (d) stage 4 (e) stage 5 (f) stage 6.

Stage 3 [t 2 - t 3]: This stage starts at t 2 when the primary and secondary side currents i Lr 1 and i a of three-level converter are decreased to zero. The primary and secondary sides of transformer T 1 is disconnected and the LLC circuit continuous to transfer energy from input source to output load with i Lo =i b . Stage 4 [t 3 - t 4]: This stage start at t 3 when S 2 is turned off. i Lr 1 and i Lr 2 start to charge C 2 and discharge C 3. The ZVS condition of S 3 is given as:

2

)(2

3222in

oss Lr r V C t i L ≥

(3)

Since the LLC converter is operated at the inductive load (f sw >f r ), the inductor current i Lr 2 is lagging to the input fundamental voltage v ac,f . Thus, S 3 can be turned on under ZVS at t 4 from light load to full load.

Stage 5 [t 4 - t 5]: This stage starts at t 4 when capacitor voltage v C 3 is decreased to zero. Since i Lr 1(t 4)+i Lr 2(t 4)>0, the anti-parallel diode of S 3 is conducting. Switch S 3 can be turned on at this moment to achieve ZVS. The ac terminal voltages v ab =-V in /2 and v ac =0, and the clamp diode D b is still conductin g to transfer energy from C o,LLC to output load. The rectified voltage v r =V LLC and the output inductor voltage v Lo=V LLC -V o <0. Thus, i Lo decreases with the slope of (V LLC -V o )/L o . The primary side inductor voltage v Lr1=n 1V LLC -V in /2<0. LLC converter is in the resonant mode with v ac =0. Thus, i Lr 2 decreases in this stage. The clamp diode current is also decreased i Db =i Lo +n 1i Lr 1. Both three-level converter and LLC converter transfer energy from input source voltage to output load in this stage. The inductor current i Lr 1 decreases linearly until it equals -i Lo /n 1. Then D b is off. The time interval in this stage is given as:

LLC

in Lo r V n V n t i L t t t 11

5145452//)(?≈?=Δ (4)

Stage 6 [t 5 - t 6]: This stage starts at t 5 when i a =i Lo and i b =0. Then the clamp diode D b is off. The energy is transferred from input voltage to output load through three-level converter and LLC circuit transfers energy to C o,LLC . The output inductor voltage v Lo =V in /(2n 1)-V o >0 and i Lo increases in this stage. This stage ends at t 6 when S 4 is turned off. Then, the circuit operations of the proposed converter in a half switching cycle are completed.

III. C IRCUIT C HARACTERISTICS OF THE P ROPOSED

C ONVERTER The energy of the proposed converter is transferred from input side to output side by both LLC circuit and three-level circuit. In stages 2-5, LLC circuit transfers energy from input voltage to output load. On the other hand, three-level circuit transfers energy from input side to output load in stages 1, 2, 5 and 6. Thus, energy is transferred from input source to output load within the full switching cycle. Since the LLC circuit is operated as an unregulated dc-dc converter with the switching frequency close to series resonant frequency, the dc voltage gain M dc,LLC =4n 2V LLC /V in is equal to unity. The output of LLC circuit can be obtained as:

)4/(2n V V in LLC = (5)

Thus, the circulating current of the LLC circuit is minimum, and the lagging-leg switches S 2 and S 3 are turned on at ZVS from zero to full load. The primary inductance L r 1 and output inductance L o are used to achieve ZVS turn-on of leading-leg switches S 1 and S 4. The ZVS condition of S 1 and S 4 is given in (1). From Fig. 5 and the discussion of operation principles in the previous section, the charge and discharge time intervals of S 1-S 4 is very fast and can be neglected in the following discussion to derive the steady state equation. In the first half cycle of switching period, stages 2, 3, 5 and 6 are included in order to obtain the output voltage. By the voltage-second balance on output inductor L o , the output voltage is derived as:

in

in sw o r in in sw o r in in in LLC

in o V n n n n V f I L n V n n n V f I L n V

n V n V V n V

V )/2(2)/2(424)221()(2121122121122151

5?+

???+≈+?+?=δδδδδδ(6)

δ is the duty ratio of the proposed converter when (S 1 and S 2) or (S 3 and S 4) are turned on. The DC voltage conversion ratio of the proposed converter is obtained in (7).

in

sw

o r in

sw o r in o DC V n n n n f I L n V n n n f I L n n n V V M )/2(2 )/2(4241/212112212

11221?+

???+==δ

δ (7)

The ripple current, maximum current and minimum current of output inductor L o approximates:

))

/2(4()

2()()2(21111

51n n V n f I L f L V n V f L V n V i in sw o r sw o o in sw o o in Lo ???≈??=

Δδδδ(8)

)/2(4(2)2(

21111max ,n n V n f I L f L V n V I i in sw

o r sw

o o in

o Lo ???+≈δ (9)

))/2(4(2)2(21111min ,n n V n f I L f L V n V

I i in sw

o r sw o o in o Lo ????≈δ (10)

If the ripple current of the output inductor is given, then the output inductance can be obtained from (8). The ripple magnetizing currents of T 1 and T 2 are expressed in (11) and (12), respectively.

1

21111151)/2(222)(m o

r m sw in m sw in Lm L n n n I L L T V L T V i ??≈?≈Δδδδ (11)

2

28m sw

in Lm L T V i ≈

Δ (12) The average diode currents of D R 1-D R 4 and D b in steady state are expressed as:

o av DR DR I i i δ≈=,2av ,1

(13) o av DR DR I i i )5.0(,4av ,3δ?≈= (14)

o Db I i )21(av ,δ?≈

(15)

The voltage stresses of D R 1-D R 4 and D b in steady state are given as:

1stress ,2stress ,1/n V v v in DR DR ≈= (16)

)2/(22stress ,4stress ,3n V V v v in LLC DR DR =≈=

(17)

)4/()2()2/(21121stress ,n n n n V V n V v in LLC in Db ?=?≈ (18)

(a)

(b)

Fig. 7. Measured voltage and current of S 1 at (a) 15A load under V in =750V (b) 15A load under V in =800V.

(a)

(b)

Fig. 8. Measured voltage and current of S 2 at (a) 10A load under V in =750V (b) 10A load under V in =800V.

Fig. 9. Measured voltages of S 1-S 4 and ac side voltages v ab and v ac at full load.

IV. E XPERIMENTAL R ESULTS

In this section, the experimental results of a laboratory prototype are demonstrated to verify the effectiveness of the proposed converter. The specifications of the proposed converter are V in : 750V-800V, V o =24V, I o =60A, f sw =100k Hz and series resonant frequency of LLC converter is f r =95kHz. The turns ratio of transformer T 1 is n 1=72/6 with L m 1=4mH and the turns ratio of T 2 is n 2=54/6 with L m 2=480μH. The primary inductances L r 1=26μH and L r 2=160μH. The resonant capacitance C r =20nF. The input split capacitances C d 1=C d 2=220nF/450V and flying capacitance C f =70nF. The output capacitances C o,LLC =50μF and C o =3300μF. The output filter inductance L o =22μH. The active switches S 1-S 4: IRFP460, rectifier diodes D R 1-D R 4: SBR40U100T, clamp diodes D 1-D 2: MUR860 and D b : M6060C. Fig. 7 shows the measured voltage and current of S 1 (leading-leg switch) at 15A (25%) load conditions. It is observed that S 1 is soft switching at 15A load. In the same manner, the measured voltage and current of S 2 (lagging-leg switch) at 10A (17%) load is given in Fig. 8. It is clear that S 2 is turned on at ZVS under 10A load. Since S 1 and S 4 are in the leading-leg and S 2 and S 3 are in the lagging-leg, it can conclude that S 1 and S 4 are turned on at ZVS from 25% (15A) load to full load and S 2 and S 3 can be turned on at ZVS from 17% (10A) load to full load. Fig. 9 gives the measured voltages of S 1-S 4 and ac side voltages v ab and v ac at full load. Fig. 10 shows the measured ac side voltages v ab and v ac , resonant capacitor voltage v Cr , and the primary side currents i Lr 1 and i Lr 2 at 100% load. There are three voltage levels on v ab and two voltage levels on v ac . The primary side current i Lr 2 is a quasi-sinusoidal current. There is

no circulating current on i Lr 1 in the freewheeling interval such that the expected circuit conduction losses in the proposed converter are less than the conduction losses in conventional three-level converter. Fig. 11 gives the measured diode currents i DR 1-i DR 4, the rectified current i a , the clamped diode current i b and the output inductor current i Lo at 25% and 100% load. It is clear that energy transfers from input to output within the full switching cycle by both three-level circuit and LLC circuit.

v ab v ac v Cr

i Lr 1i Lr 2

2

s

Fig. 10. Measured ac side voltages v ab and v ac , resonant capacitor voltage v Cr , and the primary side currents i Lr 1 and i Lr 2 at full load.

Fig. 11. Measured diode currents i DR 1-i DR 4, the rectified current i a , the clamped diode current i b and the output inductor current i Lo at full load.

V. C ONCLUSION

A new hybrid three-level dc-dc converter including a conventional three-level PWM circuit and a LLC circuit is presented in this paper to have the main functions: 1) LLC circuit operates at f sw ≈f r with minimum circulating current losses and helps lagging-leg switches to have ZVS turn-on from light load to full load, 2) Three-level converter has less circulating current losses due to the help of clamp diode D b to obtain the rectified voltage v r =V o,LLC in freewheeling interval, 3) The energy is transferred from input to output load within the whole switching cycle, and 4) The output inductance can be reduced due to the less voltage across the output inductor in freewheeling interval. The phase-shift PWM scheme is adopted to regulate output voltage at the desired voltage level. The voltage stress of each active switch is clamped at V in /2 with the help of clamp diodes D 1 and D 2 and flying capacitor C f . Compared to the conventional three-level PWM converter, the proposed converter has less circulating current losses and wide range of ZVS turn-on for lagging-leg switches. Finally, the experimental results are provided to verify the theoretical analysis and the effectiveness of the proposed converter.

A CKNOWLEDGMENT

This project is supported by the National Science Council of Taiwan under Grant NSC 102-2221-E-224 -022 -MY3.

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