温度控制系统的设计-毕业设计外文文献翻译

温度控制系统的设计-毕业设计外文文献翻译
温度控制系统的设计-毕业设计外文文献翻译

Design of the Temperature Control System Based on AT89C51

ABSTRACT

The principle and functions of the temperature control system based on microcontroller AT89C51 are studied, and the temperature measurement unit consists of the 1-Wire bus digital temperature sensor DS18B20. The system can be expected to detect the preset temperature, display time and save monitoring data. An alarm will be given by system if the temperature exceeds the upper and lower limit value of the temperature which can be set discretionarily and then automatic control is achieved, thus the temperature is achieved monitoring intelligently within a certain range. Basing on principle of the system, it is easy to make a variety of other non-linear control systems so long as the software design is reasonably changed. The system has been proved to be accurate, reliable and satisfied through field practice. KEYWORDS: AT89C51; microcontroller; DS18B20; temperature

1 INTRODUCTION

Temperature is a very important parameter in human life. In the modern society, temperature control (TC) is not only used in industrial production, but also widely used in other fields. With the improvement of the life quality, we can find the TC appliance in hotels, factories and home as well. And the trend that TC will better serve the whole society,so it is of great significance to measure and control the temperature. Based on the AT89C51 and temperature sensor DS18B20, this system controls the condition temperature intelligently. The temperature can be set discretionarily within a certain range. The system can show the time on LCD, and save monitoring data; and automatically control the temperature when the condition temperature exceeds the upper and lower limit value. By doing so it is to keep the temperature unchanged. The system is of high anti-jamming, high control precision and flexible design; it also fits the rugged environment. It is mainly used in people's life to improve the quality of the work and life. It is also versatile, so that it can be convenient to extend the use of the system. So the design is of profound importance. The general design, hardware design and software design of the system are covered.

1.1 Introduction

The 8-bit AT89C51 CHMOS microcontrollers are designed to handle high-speed calculations and fast input/output operations. MCS 51 microcontrollers are typically used for high-speed event control systems. Commercial applications include modems, motor-control systems, printers, photocopiers, air conditioner control systems, disk drives, and medical instruments. The automotive industry use MCS 51 microcontrollers in engine-control systems, airbags, suspension systems, and antilock braking systems (ABS). The AT89C51 is especially well suited to applications that benefit from its processing speed and enhanced on-chip peripheral functions set, such as automotive power-train control, vehicle dynamic suspension, antilock braking, and stability control applications. Because of these critical applications, the market requires a reliable cost-effective controller with a low interrupt latency response, ability to service the high number of time and event driven integrated peripherals needed in real time applications, and a CPU with above average processing power in a single package. The financial and legal risk of having devices that operate unpredictably is very high. Once in the market, particularly in mission critical applications such as an autopilot or anti-lock braking system, mistakes are financially prohibitive. Redesign costs can run as high as a $500K, much more if the fix means 2 back annotating it across a product family that share the same core and/or peripheral design flaw. In addition, field replacements of components is extremely expensive, as the devices are typically sealed in modules with a total value several times that of the component. To mitigate these problems, it is essential that comprehensive testing of the controllers be carried out at both the component level and system level under worst case environmental and voltage conditions. This complete and thorough validation necessitates not only a well-defined process but also a proper environment and tools to facilitate and execute the mission successfully. Intel Chandler Platform Engineering group provides post silicon system validation (SV) of various micro-controllers and processors. The system validation process can be broken into three major parts. The type of the device and its application requirements determine which types of testing are performed on the device.

1.2 The AT89C51 provides the following standard features

4Kbytes of Flash, 128 bytes of RAM, 32 I/O lines, two 16-bittimer/counters, a five vector two-level interrupt architecture, a full duple ser-ial port, on-chip oscillator

and clock circuitry. In addition, the AT89C51 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port and interrupt sys -tem to continue functioning. The Power-down Mode saves the RAM contents but freezes the oscil–lator disabling all other chip functions until the next hardware reset.

1.3Pin Description

VCC Supply voltage.

GND Ground.

Port 0:Port 0 is an 8-bit open-drain bi-directional I/O port. As an output port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high impedance inputs. Port 0 may also be configured to be the multiplexed low order address/data bus during accesses to external program and data memory. In this mode P0 has internal pull ups. Port 0 also receives the code bytes during Flash programming, and outputs the code bytes during program verification. External pull ups are required during program verification.

Port 1:Port 1 is an 8-bit bi-directional I/O port with internal pull ups. The Port 1 output buffers can sink/so -urce four TTL inputs. When 1s are written to Port 1 pins they are pulled high by the internal pull ups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pullups. Port 1 also receives the low-order address bytes during Flash programming and verification.

Port 2:Port 2 is an 8-bit bi-directional I/O port with internal pull ups. The Port 2 output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins they are pulled high by the internal pull ups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pull ups. Port 2 emits the high-order address byte during fetches from external program memory and during accesses to Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pull ups. Port 2 emits the high-order address byte during fetches from external program memory and during accesses to external data memory that use 16-bit addresses (MOVX@DPTR). In this application, it uses strong internal pull-ups when emitting 1s. During accesses to external data memory that use 8-bit addresses (MOVX @ RI), Port 2 emits the contents of the P2 Special Function Register. Port 2 also receives the high-order

address bits and some control signals durin Flash programming and verification.

Port 3:Port 3 is an 8-bit bi-directional I/O port with internal pull ups. The Port 3 output buffers can sink/sou -rce four TTL inputs. When 1s are written to Port 3 pins they are pulled high by the internal pull ups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current (IIL) because of the pull ups.

Port 3 also serves the functions of various special features of the AT89C51 as listed below:

RST:Reset input. A high on this pin for two machine cycles while the oscillator is running resets the device.

ALE/PROG:Address Latch Enable output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming. In normal operation ALE is emitted at a constant rate of 1/6 the oscillator frequency, and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped duri-ng each access to external Data Memory. If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode.

PSEN:Program Store Enable is the read strobe to external program memory. When theAT89C51 is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory.

EA/VPP:External Access Enable. EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset. EA should be strapped to VCC for internal program executions. This pin alsreceives the 12-volt programming enable voltage (VPP) during Flash programming, for parts that require 12-volt VPP.

XTAL1:Input to the inverting oscillator amplifier and input to the internal clock operating circuit.

XTAL2 :Output from the inverting oscillator amplifier. Oscillator CharacteristicsXTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier which can be configured for use as an on-chip oscillator, as shown

in Figure 1. Either a quartz crystal or ceramic resonator may be used. To drive the device from an external clock source, XTAL2 should be left unconnected while XTAL1 is driven as shown in Figure 2.There are no requirements on the duty cycle of the external clock signal, since the input to the internal clocking circuitry is through a divide-by-two flip-flop, but minimum and maximum voltage high and low time specifications must be observed. Idle Mode In idle mode, the CPU puts itself to sleep while all the on chip peripherals remain active. The mode is invoked by software. The content of the on-chip RAM and all the special functions registers remain unchanged during this mode. The idle mode can be terminated by any enabled interrupt or by a hardware reset. It should be noted that when idle is terminated by a hard ware reset, the device normally resumes program execution, from where it left off, up to two machine cycles before the internal reset algorithm takes control. On-chip hardware inhibits access to internal RAM in this event, but access to the port pins is not inhibited. To eliminate the possibility of an unexpected write to a port pin when Idle is terminated by reset, the instruction following the one that invokes Idle should not be one that writes to a port pin or to external memory.

Power-down Mode

In the power-down mode, the oscillator is stopped, and the instruction that invokes power-down is the last instruction executed. The on-chip RAM and Special Function Registers retain their values until the power-down mode is terminated. The only exit from power-down is a hardware reset. Reset redefines the SFRS but does not change the on-chip RAM. The reset should not be activated before VCC is restored to its normal operating level and must be held active long enough to allow the oscillator to restart and stabilize. The AT89C51 code memory array is programmed byte-by byte in either programming mode. To program any nonblank byte in the on-chip Flash Memory, the entire memory must be erased using the Chip Erase Mode.

2 Programming Algorithm

Before programming the AT89C51, the address, data and control signals should be set up according to the Flash programming mode table and Figure 3 and Figure 4. To program the AT89C51, take the following steps.1. Input the desired memory location on the address lines.2. Input the appropriate data byte on the data lines. 3. Activate the correct combination of control signals. 4. Raise EA/VPP to 12V for the high-voltage programming mode. 5. Pulse ALE/PROG once to program a byte in the Flash array or the lock bits. The byte-write cycle is self-timed and typically takes no

more than 1.5 ms. Repeat steps 1 through 5, changing the address and data for the entire array or until the end of the object file is reached. Data Polling: The AT89C51 features Data Polling to indicate the end of a write cycle. During a write cycle, an attempted read of the last byte written will result in the complement of the written datum on PO.7. Once the write cycle has been completed, true data are valid on all outputs, and the next cycle may begin. Data Polling may begin any time after a write cycle has been initiated.

2.1Ready/Busy:

The progress of byte programming can also be monitored by the RDY/BSY output signal. P3.4 is pulled low after ALE goes high during programming to indicate BUSY. P3.4 is pulled high again when programming is done to indicate READY.

Program Verify:

If lock bits LB1 and LB2 have not been programmed, the programmed code data can be read back via the address and data lines for verification. The lock bits cannot be verified directly. Verification of the lock bits is achieved by observing that their features are enabled.

2.2 Chip Erase:

The entire Flash array is erased electrically by using the proper combination of control signals and by holding ALE/PROG low for 10 ms. The code array is written with all “1”s. The chip erase operation must be executed before the code memory can be re-programmed.

2.3 Reading the Signature Bytes:

The signature bytes are read by the same procedure as a normal verification of locations 030H, 031H, and 032H, except that P3.6 and P3.7 must be pulled to a logic low. The values returned areas follows.

(030H) = 1EH indicates manufactured by Atmel

(031H) = 51H indicates 89C51

(032H) = FFH indicates 12V programming

(032H) = 05H indicates 5V programming

2.4 Programming Interface

Every code byte in the Flash array can be written and the entire array can be erased by using the appropriate combination of control signals. The write operation

cycle is self timed and once initiated, will automatically time itself to completion. A microcomputer interface converts information between two forms. Outside the microcomputer the information handled by an electronic system exists as a physical signal, but within the program, it is represented numerically. The function of any interface can be broken down into a number of operations which modify the data in some way, so that the process of conversion between the external and internal forms is carried out in a number of steps. An analog-to-digital converter(ADC) is used to convert a continuously variable signal to a corresponding digital form which can take any one of a fixed number of possible binary values. If the output of the transducer does not vary continuously, no ADC is necessary. In this case the signal conditioning section must convert the incoming signal to a form which can be connected directly to the next part of the interface, the input/output section of the microcomputer itself. Output interfaces take a similar form, the obvious difference being that here the flow of information is in the opposite direction; it is passed from the program to the outside world. In this case the program may call an output subroutine which supervises the operation of the interface and performs the scaling numbers which may be needed for digital-to-analog converter(DAC). This subroutine passes information in turn to an output device which produces a corresponding electrical signal, which could be converted into analog form using a DAC. Finally the signal is conditioned(usually amplified) to a form suitable for operating an actuator. The signals used within microcomputer circuits are almost always too small to be connected directly to the outside world”and some kind of interface must be used to translate them to a more appropriate form. The design of section of interface circuits is one of the most important tasks facing the engineer wishing to apply microcomputers. We have seen that in microcomputers information is represented as discrete patterns of bits; this digital form is most useful when the microcomputer is to be connected to equipment which can only be switched on or off, where each bit might represent the state of a switch or actuator. To solve real-world problems, a microcontroller must have more than just a CPU, a program, and a data memory. In addition, it must contain hardware allowing the CPU to access information from the outside world. Once the CPU gathers information and processes the data, it must also be able to effect change on some portion of the outside world. These hardware devices, called peripherals, are the CPU’s window to the outside.

The most basic form of peripheral available on microcontrollers is the general

purpose I70 port. Each of the I/O pins can be used as either an input or an output. The function of each pin is determined by setting or clearing corresponding bits in a corresponding data direction register during the initialization stage of a program. Each output pin may be driven to either a logic one or a logic zero by using CPU instructions to pin may be viewed (or read.) by the CPU using program instructions. Some type of serial unit is included on microcontrollers to allow the CPU to communicate bit-serially with external devices. Using a bit serial format instead of bit-parallel format requires fewer I/O pins to perform the communication function, which makes it less expensive, but slower. Serial transmissions are performed either synchronously or asynchronously.

3 SYSTEM GENERAL DESIGN

The hardware block diagram of the TC is shown in Fig. 1. The system hardware includes the microcontroller, temperature detection circuit, keyboard control circuit, clock circuit, Display, alarm, drive circuit and external RAM. Based on the AT89C51, the DS18B20 will transfer the temperature signal detected to digital signal. And the signal is sent to the microcontroller for processing. At last the temperature value is showed on the LCD 12232F. These steps are used to achieve the temperature detection. Using the keyboard interface chip HD7279 to set the temperature value, using the microcontroller to keep a certain temperature, and using the LCD to show the preset value for controlling the temperature. In addition, the clock chip DS1302 is used to show time and the external RAM 6264 is used to save the monitoring data. An alarm will be given by buzzer in time if the temperature exceeds the upper and lower limit value of the temperature.

3.1 HARDWARE DESIGN

A. Microcontroller

The AT89C51 is a low-power, high-performance CMOS 8-bit microcontroller with 4K bytes of in-system programmable Flash memory. The device is manufactured using Atmel’s high-density nonvolatile memory technology and is compatible with the industry-standard 80C51 instruction set and pinout. The on-chip Flash allows the program memory to be reprogrammed in-system or by a conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with in-system programmable Flash on a monolithic chip, the Atmel AT89C51 is a powerful microcontroller which provides a highly-flexible and cost-effective solution to many

embedded control applications. Minimum system of the microcontroller is shown in Fig. 2. In order to save monitoring data, the 6264 is used as an external RAM. It is a static RAM chip, low-power with 8K bytes memory.

B. Temperature Detection Circuit

The temperature sensor is the key part in the system. The Dallas DS18B20 is used, which supports the 1-Wire bus interface, and the ON-BOARD Patented is used internally. All the sensor parts and the converting circuit are integrated in integrated circuit like a transistor [1]. Its measure range is -55℃~125 ℃, and the precision between -10℃~85℃is ±0.5℃[2 ,3]. The temperature collected by the DS18B20 is transmitted in the 1-Wire bus way, and this highly raises the system anti-jamming and makes it fit in situ temperature measurement of the rugged environment [4]. There are two power supply ways for the DS18B20. The first is external power supply: the first pin of the DS18B20 is connected to the ground; the second pin serves as signal wire and the third is connected to the power. The second way is parasite power supply [5]. As the parasite power supply will lead to the complexity of the hardware circuit, the difficulty of the software control and the performance degradation of the chip, etc. But the DS18B20(s) can be connected to the I/O port of the microcontroller in the external power supply way and it is more popular. Therefore the external power supply is used and the second pin is connected to the pin P1.3 of the AT89S51. Actually, if there are multipoint to be detected, the DS18B20(s) can be connected to the 1-Wire bus. But when the number is over 8, there is a concern to the driving and the more complex software design as well as the length of the 1-Wire bus. Normally it is no more than 50m. To achieve distant control, the system can be designed in to a wireless one to break

the length limit of the 1-Wire bus [6].

C. LCD Circuit

The LCD 12232F is used, which can be used to show characters, temperature value and time, and supply a friendly display interface. The 12232F is a LCD with 8192 128×32 pixels Chinese character database and 128 16×8 pixels ASCII character set graphics. It mainly consists of row drive/column drive and 128×32 full lattice LCD with the function of displaying graphics as well as 7.5×2 Chinese characters. It is in a parallel or serial mode to connect to external CPU [7]. In order to economize the hardware resource, the 12232F should be connected to the AT89S51 in serial mode with only 4 output ports used. The LCD grayscale can be changed by adjusting

the variable resistor connected the pin Vlcd of the LCD. CLK is used to transmit serial communication clock. SID is used to transmit serial data. CS is used to enable control the LCD. L+ is used to control the LCD backlight power.

D. Clock Circuit

The Dallas DS18B20 is used, which is a high performance, low-power and real-time clock chip with RAM. The DS18B20 serves in the system with calendar clock and is used to monitor the time. The time data is read and processed by the AT89C51 and then displayed by the LCD. Also the time can be adjusted by the keyboard. The DS18B20 crystal oscillator is set at 32768Hz, and the recommended compensation capacitance is 6pF. The oscillator frequency is lower, so it might be possible not to connect the capacitor, and this would not make a big difference to the time precision. The backup power supply can be connected to a 3.6V rechargeable battery.

E. Keyboard Control Circuit

The keyboard interface in the system is driven by the HD7279A which has a +5V single power supply and which is connected to the keyboard and display without using any active-device. According to the basic requirements and functions of the system, only 6 buttons are needed. The system's functions are set by the AT89C51 receiving the entered data. In order to save the external resistor, the 1×6 keyboard is used, and the keyboard codes are defined as: 07H, 0FH, 17H, 1FH, 27H, 2FH. The order can be read out by reading the code instruction. HD7279A is connected to the AT89S51 in serial mode and only 4 ports are need. As shown in Fig. 6, DIG0~DIG5 and DP are respectively the column lines and row line ports of the six keys which achieve keyboard monitoring, decoding and key codes identification.

F. Alarm Circuit

In order to simplify the circuit and convenient debugging, a 5V automatic buzzer is used in the alarm circuit [8]. And this make the software programming simplified. As shown in Fig. 7, it is controlled by the PNP transistor 9012 whose base is connected to the pin P2.5 of the AT89C51. When the temperature exceeds the upper and lower limit value,the P2.5 output low level which makes the transistor be on and then an alarm is given by the buzzer.

G. Drive Circuit

A step motor is used as the drive device to control the temperature. The four-phase and eight-beat pulse distribution mode is used to drive motor and the

simple delay program is used to handle the time interval between the pulses to obtain different rotational speed. There are two output states for the step motor. One: when the temperature is over the upper value, the motor rotates reversely (to low the temperature), while when lower than the lower limit value, the motor rotates normally (to raise the temperature); besides not equals the preset value. Two: when the temperature is at somewhere between the two ends and equals the preset value, the motor stops. These steps are used to achieve the temperature control. In addition, the motor speed can also be adjusted by relative buttons. As shown in Fig. 8, the code data is input through ports A11~A8 (be P2.3~P2.0) of the AT89C51 and inverted output by the inverter 74LS04. Finally it is amplified by the power amplifier 2803A to power the motor.

3.2 SOFTW ARE DESIGN

According to the general design requirement and hardware circuit principle of the system, as well as the improvement of the program readability, transferability and the convenient debugging, the software design is modularized. The system flow mainly includes the following 8 steps: POST (Power-on self-test), system initiation, temperature detection, alarm handling, temperature control, clock chip DS18B20 operation, LCD and keyboard operation. The main program flow is shown in Fig. 9. Give a little analysis to the above 8 tasks, it is easy to find out that the last five tasks require the real time operation. But to the temperature detection it can be achieved with timer0 timing 1 second, that is to say temperature detection occurs per second. The system initiation includes global variable definition, RAM initiation, special function register initiation and peripheral equipment initiation. Global variable definition mainly finishes the interface definition of external interface chip connected to the AT89C51, and special definition of some memory units. RAM initiation mainly refers to RAM processing. For example when the system is electrified the time code will be stored in the internal unit address or the scintillation flag will be cleared. The special function register initiation includes loading the initial value of timer and opening the interrupt. For example, when the system is electrified the timer is initialized. The peripheral equipment initiation refers to set the initial value of peripheral equipment. For example, when the system is electrified, the LCD should be initialized, the start-up display should be called, the temperature conversion command should be issued firstly and the clock chip DS18B20 should also be initialized. The alarm handling is mainly the lowering and the raising of temperature to make the

temperature remain with the preset range. When the temperature is between the upper and the lower limit value, it goes to temperature control handling, that is to say the temperature need to be raised or lowered according to the preset value. By doing so make the condition temperature equal to the preset value and hence to reach the temperature target.

4 CONCLUSION

The temperature control system has the advantages of friendly human-computer interaction interface, simple hardware, low cost, high temperature control precision (error in the range of ±1 ℃), convenience and versatility, etc. It can be widely used in the occasions with -55℃to 125℃range, and there is a certain practical value.

毕业设计外文翻译资料

外文出处: 《Exploiting Software How to Break Code》By Greg Hoglund, Gary McGraw Publisher : Addison Wesley Pub Date : February 17, 2004 ISBN : 0-201-78695-8 译文标题: JDBC接口技术 译文: JDBC是一种可用于执行SQL语句的JavaAPI(ApplicationProgrammingInterface应用程序设计接口)。它由一些Java语言编写的类和界面组成。JDBC为数据库应用开发人员、数据库前台工具开发人员提供了一种标准的应用程序设计接口,使开发人员可以用纯Java语言编写完整的数据库应用程序。 一、ODBC到JDBC的发展历程 说到JDBC,很容易让人联想到另一个十分熟悉的字眼“ODBC”。它们之间有没有联系呢?如果有,那么它们之间又是怎样的关系呢? ODBC是OpenDatabaseConnectivity的英文简写。它是一种用来在相关或不相关的数据库管理系统(DBMS)中存取数据的,用C语言实现的,标准应用程序数据接口。通过ODBCAPI,应用程序可以存取保存在多种不同数据库管理系统(DBMS)中的数据,而不论每个DBMS使用了何种数据存储格式和编程接口。 1.ODBC的结构模型 ODBC的结构包括四个主要部分:应用程序接口、驱动器管理器、数据库驱动器和数据源。应用程序接口:屏蔽不同的ODBC数据库驱动器之间函数调用的差别,为用户提供统一的SQL编程接口。 驱动器管理器:为应用程序装载数据库驱动器。 数据库驱动器:实现ODBC的函数调用,提供对特定数据源的SQL请求。如果需要,数据库驱动器将修改应用程序的请求,使得请求符合相关的DBMS所支持的文法。 数据源:由用户想要存取的数据以及与它相关的操作系统、DBMS和用于访问DBMS的网络平台组成。 虽然ODBC驱动器管理器的主要目的是加载数据库驱动器,以便ODBC函数调用,但是数据库驱动器本身也执行ODBC函数调用,并与数据库相互配合。因此当应用系统发出调用与数据源进行连接时,数据库驱动器能管理通信协议。当建立起与数据源的连接时,数据库驱动器便能处理应用系统向DBMS发出的请求,对分析或发自数据源的设计进行必要的翻译,并将结果返回给应用系统。 2.JDBC的诞生 自从Java语言于1995年5月正式公布以来,Java风靡全球。出现大量的用java语言编写的程序,其中也包括数据库应用程序。由于没有一个Java语言的API,编程人员不得不在Java程序中加入C语言的ODBC函数调用。这就使很多Java的优秀特性无法充分发挥,比如平台无关性、面向对象特性等。随着越来越多的编程人员对Java语言的日益喜爱,越来越多的公司在Java程序开发上投入的精力日益增加,对java语言接口的访问数据库的API 的要求越来越强烈。也由于ODBC的有其不足之处,比如它并不容易使用,没有面向对象的特性等等,SUN公司决定开发一Java语言为接口的数据库应用程序开发接口。在JDK1.x 版本中,JDBC只是一个可选部件,到了JDK1.1公布时,SQL类包(也就是JDBCAPI)

毕业设计外文翻译附原文

外文翻译 专业机械设计制造及其自动化学生姓名刘链柱 班级机制111 学号1110101102 指导教师葛友华

外文资料名称: Design and performance evaluation of vacuum cleaners using cyclone technology 外文资料出处:Korean J. Chem. Eng., 23(6), (用外文写) 925-930 (2006) 附件: 1.外文资料翻译译文 2.外文原文

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电气专业毕业设计外文翻译

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毕业设计(论文)外文文献翻译 文献、资料中文题目:软件开发概念和设计方法文献、资料英文题目: 文献、资料来源: 文献、资料发表(出版)日期: 院(部): 专业: 班级: 姓名: 学号: 指导教师: 翻译日期: 2017.02.14

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毕业设计英文翻译

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本科生毕业设计(论文)外文科技文献译文 译文题目(外文题目)学院(系)Socket网络编程的设计与实现A Design and Implementation of Active Network Socket Programming 机械与能源工程学院 专学业 号 机械设计制造及其自动化 071895 学生姓名李杰林 日期2012年5月27日指导教师签名日期

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1 导言 1990年,为了在互联网上引入新的网络协议,克拉克和藤农豪斯[1]提出了一种新的设 计框架。自公布这一标志性文件,活跃网络设计框架[2,3,10]已经慢慢在20世纪90 年代末成形。活跃网络允许程序代码和数据可以同时在互联网上提供积极的网络范式,此外,他们可以在传送到目的地的过程中得到执行和修改。ABone作为一个全球性的骨干网络,开 始进行活跃网络实验。除执行平台的不成熟,商业上活跃网络在互联网上的部署也成为主要障碍。例如,一个供应商可能不乐意让网络路由器运行一些可能影响其预期路由性能的未知程序,。因此,作为替代提出了允许活跃网络在互联网上运作的概念,如欧洲研究课题组提出的应用层活跃网络(ALAN)项目[4]。 在ALAN项目中,活跃服务器系统位于网络的不同地址,并且这些应用程序都可以运行在活跃系统的网络应用层上。另一个潜在的方法是网络服务提供商提供更优质的活跃网络服务类。这个服务类应该提供最优质的服务质量(QOS),并允许路由器对计算机的访问。通过这种方法,网络服务提供商可以创建一个新的收入来源。 对活跃网络的研究已取得稳步进展。由于活跃网络在互联网上推出了可编程性,相应 地应建立供应用程序工作的可执行平台。这些操作系统平台执行环境(EES),其中一些已 被创建,例如,活跃信号协议(ASP)[12]和活跃网络传输系统(ANTS)[11]。因此,不 同的应用程序可以实现对活跃网络概念的测试。 在这些EES 环境下,已经开展了一系列验证活跃网络概念的实验,例如,移动网络[5],网页代理[6],多播路由器[7]。活跃网络引进了很多在网络上兼有灵活性和可扩展性的方案。几个研究小组已经提出了各种可通过路由器进行网络计算的可执行环境。他们的成果和现有基础设施的潜在好处正在被评估[8,9]。不幸的是,他们很少关心互操作性问题,活跃网络由多个执行环境组成,例如,在ABone 中存在三个EES,专为一个EES编写的应用程序不能在其他平台上运行。这就出现了一种资源划分为不同运行环境的问题。此外,总是有一些关键的网络应用需要跨环境运行,如信息收集和关键点部署监测网络的服务。 在本文中,被称为活跃网络Socket编程(ANSP)的框架模型,可以在所有EES下运行。它提供了以下主要目标: ??通过单一编程接口编写应用程序。 由于ANSP提供的编程接口,使得EES的设计与ANSP 独立。这使得未来执行环境的发展和提高更加透明。

毕业设计_英语专业论文外文翻译

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本科毕业设计外文翻译

Section 3 Design philosophy, design method and earth pressures 3.1 Design philosophy 3.1.1 General The design of earth retaining structures requires consideration of the interaction between the ground and the structure. It requires the performance of two sets of calculations: 1)a set of equilibrium calculations to determine the overall proportions and the geometry of the structure necessary to achieve equilibrium under the relevant earth pressures and forces; 2)structural design calculations to determine the size and properties of thestructural sections necessary to resist the bending moments and shear forces determined from the equilibrium calculations. Both sets of calculations are carried out for specific design situations (see 3.2.2) in accordance with the principles of limit state design. The selected design situations should be sufficiently Severe and varied so as to encompass all reasonable conditions which can be foreseen during the period of construction and the life of the retaining wall. 3.1.2 Limit state design This code of practice adopts the philosophy of limit state design. This philosophy does not impose upon the designer any special requirements as to the manner in which the safety and stability of the retaining wall may be achieved, whether by overall factors of safety, or partial factors of safety, or by other measures. Limit states (see 1.3.13) are classified into: a) ultimate limit states (see 3.1.3); b) serviceability limit states (see 3.1.4). Typical ultimate limit states are depicted in figure 3. Rupture states which are reached before collapse occurs are, for simplicity, also classified and

毕业设计外文翻译原文

编号: 毕业设计(论文)外文翻译 (原文) 院(系):应用科技学院 专业:机械设计制造及其自动化 学生姓名:邓瑜 学号:0501120501 指导教师单位:应用科技学院 姓名:黄小能 职称: 2009年 5 月20 日

The Injection Molding The Introduction of Molds The mold is at the core of a plastic manufacturing process because its cavity gives a part its shape. This makes the mold at least as critical-and many cases more so-for the quality of the end product as, for example, the plasticiting unit or other components of the processing equipment. Mold Material Depending on the processing parameters for the various processing methods as well as the length of the production run, the number of finished products to be produced, molds for plastics processing must satisfy a great variety of requirements. It is therefore not surprising that molds can be made from a very broad spectrum of materials, including-from a technical standpoint-such exotic materials as paper matched and plaster. However, because most processes require high pressures, often combined with high temperatures, metals still represent by far the most important material group, with steel being the predominant metal. It is interesting in this regard that, in many cases, the selection of the mold material is not only a question of material properties and an optimum price-to-performance ratio but also that the methods used to produce the mold, and thus the entire design, can be influenced. A typical example can be seen in the choice between cast metal molds, with their very different cooling systems, compared to machined molds. In addition, the production technique can also have an effect; for instance, it is often reported that, for the sake of simplicity, a prototype mold is frequently machined from solid stock with the aid of the latest technology such as computer-aided (CAD) and computer-integrated manufacturing (CIM). In contrast to the previously used methods based on the use of patterns, the use of CAD and CAM often represents the more economical solution today, not only because this production capability is available pin-house but also because with any other technique an order would have to be placed with an outside supplier. Overall, although high-grade materials are often used, as a rule standard materials are used in mold making. New, state-of-the art (high-performance) materials, such as ceramics, for instance, are almost completely absent. This may be related to the fact that their desirable characteristics, such as constant properties up to very high temperatures, are not required on molds, whereas their negative characteristics, e. g. low tensile strength and poor thermal conductivity, have a clearly related to ceramics, such as sintered material, is found in mild making only to a limited degree. This refers less to the modern materials and components

抛光瓷砖毕业设计外文文献翻译

毕业设计外文资料翻译 题目POLISHING OF CERAMIC TILES 抛光瓷砖 学院材料科学与工程 专业复合材料与工程 班级 学生 学号 指导教师 二〇一二年三月二十八日

MATERIALS AND MANUFACTURING PROCESSES, 17(3), 401–413 (2002) POLISHING OF CERAMIC TILES C. Y. Wang,* X. Wei, and H. Yuan Institute of Manufacturing Technology, Guangdong University ofTechnology, Guangzhou 510090, P.R. China ABSTRACT Grinding and polishing are important steps in the production of decorative vitreous ceramic tiles. Different combinations of finishing wheels and polishing wheels are tested to optimize their selection. The results show that the surface glossiness depends not only on the surface quality before machining, but also on the characteristics of the ceramic tiles as well as the performance of grinding and polishing wheels. The performance of the polishing wheel is the key for a good final surface quality. The surface glossiness after finishing must be above 208 in order to get higher polishing quality because finishing will limit the maximum surface glossiness by polishing. The optimized combination of grinding and polishing wheels for all the steps will achieve shorter machining times and better surface quality. No obvious relationships are found between the hardness of ceramic tiles and surface quality or the wear of grinding wheels; therefore, the hardness of the ceramic tile cannot be used for evaluating its machinability. Key Words: Ceramic tiles; Grinding wheel; Polishing wheel

java毕业论文外文文献翻译

Advantages of Managed Code Microsoft intermediate language shares with Java byte code the idea that it is a low-level language witha simple syntax , which can be very quickly translated intonative machine code. Having this well-defined universal syntax for code has significant advantages. Platform independence First, it means that the same file containing byte code instructions can be placed on any platform; atruntime the final stage of compilation can then be easily accomplished so that the code will run on thatparticular platform. In other words, by compiling to IL we obtain platform independence for .NET, inmuch the same way as compiling to Java byte code gives Java platform independence. Performance improvement IL is actually a bit more ambitious than Java bytecode. IL is always Just-In-Time compiled (known as JIT), whereas Java byte code was ofteninterpreted. One of the disadvantages of Java was that, on execution, the process of translating from Javabyte code to native executable resulted in a loss of performance. Instead of compiling the entire application in one go (which could lead to a slow start-up time), the JITcompiler simply compiles each portion of code as it is called (just-in-time). When code has been compiled.once, the resultant native executable is stored until the application exits, so that it does not need to berecompiled the next time that portion of code is run. Microsoft argues that this process is more efficientthan compiling the entire application code at the start, because of the likelihood that large portions of anyapplication code will not actually be executed in any given run. Using the JIT compiler, such code willnever be compiled.

毕业设计外文翻译格式实例.

理工学院毕业设计(论文)外文资料翻译 专业:热能与动力工程 姓名:赵海潮 学号:09L0504133 外文出处:Applied Acoustics, 2010(71):701~707 附件: 1.外文资料翻译译文;2.外文原文。

附件1:外文资料翻译译文 基于一维CFD模型下汽车排气消声器的实验研究与预测Takeshi Yasuda, Chaoqun Wua, Noritoshi Nakagawa, Kazuteru Nagamura 摘要目前,利用实验和数值分析法对商用汽车消声器在宽开口喉部加速状态下的排气噪声进行了研究。在加热工况下发动机转速从1000转/分钟加速到6000转/分钟需要30秒。假定其排气消声器的瞬时声学特性符合一维计算流体力学模型。为了验证模拟仿真的结果,我们在符合日本工业标准(JIS D 1616)的消声室内测量了排气消声器的瞬态声学特性,结果发现在二阶发动机转速频率下仿真结果和实验结果非常吻合。但在发动机高阶转速下(从5000到6000转每分钟的四阶转速,从4200到6000转每分钟的六阶转速这样的高转速范围内),计算结果和实验结果出现了较大差异。根据结果分析,差异的产生是由于在模拟仿真中忽略了流动噪声的影响。为了满足市场需求,研究者在一维计算流体力学模型的基础上提出了一个具有可靠准确度的简化模型,相对标准化模型而言该模型能节省超过90%的执行时间。 关键字消声器排气噪声优化设计瞬态声学性能 1 引言 汽车排气消声器广泛用于减小汽车发动机及汽车其他主要部位产生的噪声。一般而言,消声器的设计应该满足以下两个条件:(1)能够衰减高频噪声,这是消声器的最基本要求。排气消声器应该有特定的消声频率范围,尤其是低频率范围,因为我们都知道大部分的噪声被限制在发动机的转动频率和它的前几阶范围内。(2)最小背压,背压代表施加在发动机排气消声器上额外的静压力。最小背压应该保持在最低限度内,因为大的背压会降低容积效率和提高耗油量。对消声器而言,这两个重要的设计要求往往是互相冲突的。对于给定的消声器,利用实验的方法,根据距离尾管500毫米且与尾管轴向成45°处声压等级相近的排气噪声来评估其噪声衰减性能,利用压力传感器可以很容易地检测背压。 近几十年来,在预测排气噪声方面广泛应用的方法有:传递矩阵法、有限元法、边界元法和计算流体力学法。其中最常用的方法是传递矩阵法(也叫四端网络法)。该方

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