单片机和DS18B20的温度控制系统设计中英文献翻译
大学
毕业论文（设计）
外文文献翻译
申请学位：工学学士学位
院系：学院
专业：电子信息工程
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201x年5月28日
大学
DS18B20 Digital Thermometer
DESCRIPTION
The DS18B20 Digital Thermometer provides 9 to 12-bit (configurable) temperature readings which indicate the temperature of the device.
Information is sent to/from the DS18B20 over a 1-Wire interface, so that only one wire (and ground) needs to be connected from a central microprocessor to a DS18B20. Power for reading, writing, and performing temperature conversions can be derived from the data line itself with no need for an external power source.
Because each DS18B20 contains a unique silicon serial number, multiple DS18B20s can exist on the same 1-Wire bus. This allows for placing temperature sensors in many different places. Applications where this feature is useful include HV AC environmental controls, sensing temperatures inside buildings, equipment or machinery, and process monitoring and control.
FEATURES
Unique 1-Wire interface requires only one port pin for communication
Multidrop capability simplifies distributed temperature sensing applications
Requires no external components
Can be powered from data line. Power supply range is 3.0V to 5.5V
Zero standby power required
Measures temperatures from -55°C to+125°C. Fahrenheit equivalent is -67°F to +257°F
Thermometer resolution is programmable from 9 to 12 bits
Converts 12-bit temperature to digital word in 750 ms (max.)
User-definable, nonvolatile temperature alarm settings
Alarm search command identifies and addresses devices whose temperature is outside of programmed limits (temperature alarm condition)
Applications include thermostatic controls, industrial systems, consumer products,thermometers, or any thermally sensitivesystem.
PIN ASSIGNMENT
PIN DESCRIPTION
GND - Ground
DQ - Data In/Out
VDD - Power Supply V oltage
NC - No Connect
DETAILED PIN DESCRIPTION
OVERVIEW
The block diagram of Figure 1 shows the major components of the DS18B20. The DS18B20 has four main data components: 1) 64-bit lasered ROM, 2) temperature sensor, 3) nonvolatile temperature alarm triggers TH and TL. The device derives its power from the 1-Wire communication line by storing energy on an internal capacitor during periods of time when the signal line is high and continues to operate off this power source during the low times of the 1-Wire line until it returns high to replenish the parasite (capacitor) supply. As an alternative, the DS18B20 may also be powered from an external 3 volt - 5.5 volt supply.
DS18B20 BLOCK DIAGRAM Figure 1
Communication to the DS18B20 is via a 1-Wire port. With the 1-Wire port, the memory and control functions will not be available before the ROM function protocol has been established. The master must first provide one of five ROM function commands: 1) Read ROM, 2) Match ROM, 3) Search ROM, 4) Skip ROM, or 5) Alarm Search. These commands operate on the 64-bit lasered ROM portion of each
device and can single out a specific device if many are present on the 1-Wire line as well as indicate to the bus master how many and what types of devices are present. After a ROM function sequence has been successfully executed, the memory and control functions are accessible and the master may then provide any one of the six memory and control function commands.
One control function command instructs the DS18B20 to perform a temperature measurement. The result of this measurement will be placed in the DS18B20’s scratch-pad memory, and may be read by issuing a memory function command which reads the contents of the scratchpad memory. The temperature alarm triggers TH and TL consist of 1 byte EEPROM each. If the alarm search command is not applied to the DS18B20, these registers may be used as general purpose user memory. The scratchpad also contains a configuration byte to set the desired resolution of the temperature to digital conversion. Writing TH, TL, and the configuration byte is done using a memory function command. Read access to these registers is through the scratchpad. All data is read and written least significant bit first.
1-WIRE BUS SYSTEM
The 1-Wire bus is a system which has a single bus master and one or more slaves. The DS18B20 behaves as a slave. The discussion of this bus system is broken down into three topics: hardware configuration, transaction sequence, and 1-Wire signaling (signal types and timing).
HARDWARE CONFIGURATION
The 1-Wire bus has only a single line by definition; it is important that each device on the bus be able to drive it at the appropriate time. To facilitate this, each device attached to the 1-Wire bus must have open drain or 3-state outputs. The 1-Wire port of the DS18B20 (DQ pin) is open drain with an internal circuit equivalent to that shown in Figure 9. A multidrop bus consists of a 1-Wire bus with multiple slaves attached. The 1-Wire bus requires a pullup resistor of
The idle state for the 1-Wire bus is high. If for any reason a transaction needs to be suspended, the bus MUST be left in the idle state if the transaction is to resume. Infinite recovery time can occur between bits so long as the 1-Wire bus is in the inactive (high) state during the recovery period. If this does not occur and the bus is left low for more than 480 s, all components on the bus will be reset.
HARDWARE CONFIGURATION
TRANSACTION SEQUENCE
The protocol for accessing the DS18B20 via the 1-Wire port is as follows:
_ Initialization
_ ROM Function Command
_ Memory Function Command
_ Transaction/Data
INITIALIZATION
All transactions on the 1-Wire bus begin with an initialization sequence. The initialization sequence consists of a reset pulse transmitted by the bus master followed by presence pulse(s) transmitted by the slave(s). The presence pulse lets the bus master know that the DS18B20 is on the bus and is rea dy to operate. For more details, see the “1-Wire Signaling” section.
ROM FUNCTION COMMANDS
Once the bus master has detected a presence, it can issue one of the five ROM function commands. All ROM function commands are 8 bits long. A list of these commands follows (refer to flowchart in Figure 5)
Read ROM [33h]
This command allows the bus master to read the DS18B20’s 8-bit family code, unique 48-bit serial number, and 8-bit CRC. This command can only be used if there is a single DS18B20 on the bus. If more than one slave is present on the bus, a data collision will occur when all slaves try to transmit at the same time (open drain will produce a wired AND result).
Match ROM [55h]
The match ROM command, followed by a 64-bit ROM sequence, allows the bus master to address a specific DS18B20 on a multidrop bus. Only the DS18B20 that exactly matches the 64-bit ROM sequence will respond to the following memory function command. All slaves that do not match the 64-bit ROM sequence will wait for a reset pulse. This command can be used with a single or multiple devices on the bus.
Skip ROM [CCh]
This command can save time in a single drop bus system by allowing the bus master to access the memory functions without providing the 64-bit ROM code. If more than one slave is present on the bus and a Read command is issued following the Skip ROM command, data collision will occur on the bus as multiple slaves transmit simultaneously (open drain pulldowns will produce a wired AND result).
Search ROM [F0h]
When a system is initially brought up, the bus master might not know the number of devices on the 1-Wire bus or their 64-bit ROM codes. The search ROM command allows the bus master to use a process of elimination to identify the 64-bit ROM codes of all slave devices on the bus.
Alarm Search [ECh]
The flowchart of this command is identical to the Search ROM command. However, the DS18B20 will respond to this command only if an alarm condition has been encountered at the last temperature measurement. An alarm condition is defined as a temperature higher than TH or lower than TL. The alarm condition remains set as long as the DS18B20 is powered up, or until another temperature measurement reveals a non-alarming value. For alarming, the trigger values stored in EEPROM are taken into account. If an alarm condition exists and the TH or TL settings are changed, another temperature conversion should be done to validate any alarm conditions.
Example of a ROM Search
The ROM search process is the repetition of a simple three-step routine: read a bit, read the complement of the bit, then write the desired value of that bit. The bus master performs this simple, three-step routine on each bit of the ROM. After one complete pass, the bus master knows the contents of the ROM in one device. The remaining number of devices and their ROM codes may be identified by additional passes.
The following example of the ROM search process assumes four different devices are connected to the same 1-Wire bus. The ROM data of the four devices is as shown:
ROM1 00110101...
ROM2 10101010...
ROM3 11110101...
ROM4 00010001...
The search process is as follows:
1. The bus master begins the initialization sequence by issuing a reset pulse. The slave devices respond by issuing simultaneous presence pulses.
2. The bus master will then issue the Search ROM command on the 1-Wire bus.
3. The bus master reads a bit from the 1-Wire bus. Each device will respond by placing the value of the first bit of their respective ROM data onto the 1-Wire bus. ROM1 and ROM4 will place a 0 onto the 1-Wire bus, i.e., pull it low. ROM2 and ROM3 will place a 1 onto the 1-Wire bus by allowing the line to stay high. The result is the logical AND of all devices on the line, therefore the bus master sees a 0. The bus master reads another bit. Since the Search ROM data command is being executed,
all of the devices on the 1-Wire bus respond to this second read by placing the complement of the first bit of their respective ROM data onto the 1-Wire bus. ROM1 and ROM4 will place a 1 onto the 1-Wire, allowing the line to stay high. ROM2 and ROM3 will place a 0 onto the 1-Wire, thus it will be pulled low. The bus master again observes a 0 for the complement of the first ROM data bit. The bus master has determined that there are some devices on the 1-Wire bus that have a 0 in the first position and others that have a 1. The data obtained from the two reads of the three-step routine have the following interpretations:
4. The bus master writes a 0. This deselects ROM2 and ROM3 for the remainder of this search pass,
leaving only ROM1 and ROM4 connected to the 1-Wire bus.
5. The bus master performs two more reads and receives a 0-bit followed by a 1-bit. This
indicates that all devices still coupled to the bus have 0s as their second ROM data bit.
6. The bus master then writes a 0 to keep both ROM1 and ROM4 coupled.
7. The bus master executes two reads and receives two 0-bits. This indicates that both 1-bits and 0-bits exist as the 3rd bit of the ROM data of the attached devices.
8. The bus master writes a 0-bit. This deselects ROM1, leaving ROM4 as the only device still
connected.
9. The bus master reads the remainder of the ROM bits for ROM4 and continues to access the part if
desired. This completes the first pass and uniquely identifies one part on the 1-Wire bus.
10. The bus master starts a new ROM search sequence by repeating steps 1 through 7.
11. The bus master writes a 1-bit. This decouples ROM4, leaving only ROM1 still coupled.
12. The bus master reads the remainder of the ROM bits for ROM1 and communicates to the underlying logic if desired. This completes the second ROM search pass, in which another of the ROMs was found.
13. The bus master starts a new ROM search by repeating steps 1 through 3.
NOTE:
The bus master learns the unique ID number (ROM data pattern) of one 1-Wire device on each ROM
Search operation. The time required to derive the part’s unique ROM code is:
The bus master is therefore capable of identifying 75 different 1-Wire devices per second. Single chip brief introduction:
The monolithic integrated circuit said that the monolithic micro controller, it is not completes some logical function the chip, but integrates a computer system to a chip on. Summary speaking: A chip has become a computer. Its volume is small, the quality is light, and the price cheap, for the study, the application and the development has provided the convenient condition. At the same time, the study use monolithic integrated circuit is understands the computer principle and the structure best choice.
The monolithic integrated circuit interior also uses with the computer function similar
module, for instance CPU, memory, parallel main line, but also has with the hard disk behave identically the memory component7 what is different is its these part performance is opposite our home-use computer weak many, but the price is also low, generally does not surpass 10 Yuan then Made some control electric appliance one kind with it is not the 'very complex work foot, We use now the completely automatic drum washer, the platoon petti-coat pipe: VCD and so on Inside the electrical appliances may see its form! It is mainly takes the control section the core part.
It is one kind of online -like real-time control computer, online -like is the scene control, needs to have the strong antijamming ability, the low cost, this is also and the off-line type computer (for instance home use PC,) main difference
The monolithic integrated circuit is depending on the procedure, and may revise. Realizes the different function through the different procedure, particularly special unique some functions, this is other component needs to take the very big effort to be able to achieve, some are the flowered big strength is also very difficult to achieve. One is not the very complex function, if develops in the 50s with the US 74 series, or the 60s's CD4000 series these pure hardware do decides, the electric circuit certainly arc a big PCB board ! But if, if succeeded in the 70s with the US puts in the market the series monolithic integrated circuit, the result will have the huge difference. Because only the monolithic integrated circuit compiles through you the procedure may realize the high intelligence, high efficiency, as well as redundant reliability
The CPU is the key component of a digital computer. Its purpose is to decode instruction received from memory and perform transfers, arithmetic, logic, and control operations with data stored in internal registers, memory, or I/O interface units. Externally, the CPU provides one or more buses for transferring instructions, data, and control information to and from components connected to it. A microcontroller is present in the keyboard and in the monitor in the generic computer; thus these components are also shaded. In such microcontrollers, the CPU may be quite different from those discussed in this chapter. The word lengths may be short, the number of registers small, and the instruction sets limited. Performance, relatively speaking, is poor, but adequate for the task. Most important, the cost of these microcontrollers is very low, making their use cost effective.
Because the monolithic integrated circuit to the cost is sensitive, therefore present occupies the dominant status the software is the most preliminary assembly language7 it was except the binary machine code above the most preliminary language, since why were such preliminary must use?
Why high-level did the language already achieve the visualization programming level not to use? The reason is very simple, is the monolithic integrated circuit docs not have home computer
such CPU, and also has not looked like the hard disk such mass memory equipment. Inside even if a visualization higher order language compilation script only then a button, also will achieve several dozens K the sizes! Does not speak anything regarding the home use PC hard disk, but says regarding the monolithic integrated circuit cannot accept. The monolithic integrated circuit in the hardware source aspect's use factor must very Gao Caixing, therefore assembly, although primitive actually massively is using, Same truth, if attains supercomputer's on operating system and the application software home use PC to come up the movement, home use PC could also not withstand.
It can be said that the 20th century surmounted three "the electricity" the time, namely the electrical time, the Electronic Age and already entered computer time. However, this kind of computer, usually refers to the personal computer, is called PC machine. It by the main engine, the keyboard, the monitor and so on is composed. Also has a kind of computer, most people actually not how familiar. This kind of computer is entrusts with the intelligence each kind of mechanical monolithic integrated circuit (also to call micro controller). , This kind of computer's smallest system only has used as the name suggests a piece of integrated circuit, then carries on the simple operation and the control. Because its volume is small, usually hides in is accused the machinery "the belly". It in the entire installment, plays is having like the human brains role, it went wrong, the entire installment paralyzed. Now, this kind of monolithic integrated circuit's use domain already very widespread, like the intelligent measuring appliance, the solid work paid by time control, the communication equipment, the guidance system, the domestic electric appliances and so on, Once each product used the monolithic integrated circuit, could get up causes the effect which the product turned to a new generation, often before product range crown by adjective---- ‘intelligence’, like intelligence washer and so on. Now some factory's technical personnel or other extra-curricular electronic exploiter do certain products, are not the electric circuit are too complex, is the function is too simple, and is imitated extremely easily. Investigates its reason, possibly on card, in the product has not used on the monolithic integrated circuit or other programmable logical component.
DS18B20 数字温度计
描述
DS18B20 数字温度计提供9至12位温度读数，指示器件的温度。
信息经过单线接口送入DS18B20或送出，因此从中央处理器到DS18B20仅需连接一条（和地）。读、写和完成温度变换所需的电源可以有数据线本身提供，而不需要外部电源。
因为每一个DS18B20有唯一的系列号，因此多个DS18B20可以存在于同一条单线总线上。这允许在许多不同的地方放置温度灵敏器件。此特性的应用范围包括HVAC环境控制，建筑物、设备或机械内的温度检测，以及过程监视和控制中的温度检测。
特性
独特的单线接口，只需一个接口引脚即可通信。
多点能力使分布式温度检测应用得以简化。
不需要外部元件。
可用数据线供电，提供3.0V到5.5V的电源。
不需备份电源。
测量范围从-55°C 到+125°C，等效的华氏温标范围是-67°F 到+257°F
以9到12位数字值方式读出温度。
在750毫秒内把12位温度变换为数字。
用户可定义的，非易失性的温度警告设置。
告警搜索命令识别和寻址温度在编定的极限之外的器件（温度告警情况）。
应用范围包括恒温控制，工业系统，消费类产品，温度计或任何热敏系统。
引脚排列
引脚说明
GND –地
DQ –数字输入输出
VDD –可选的VDD
NC –不连接
详细引脚说明
综述
图1的方框图表示DS18B20的主要部件。DS18B20有三个主要的数据部件：1）64为激光ROM，2）温度灵敏元件，3）非易失性温度告警触发器TH和TL。器件从单线的通信线取得其电源，在信号线为高电平的时间周期内，把能量贮存在内部的电容器中，在单信号线为低电平的时间期内断开此电源，直到信号线变为高电平重新接上寄生（电容）电源为止，作为另一种可供选择的方法，DS18B20也用外部5V电源供电。
与DS18B20的通信经过一个单线接口。在单线接口情况下，在ROM操作未定建立之前不能使用存贮器和控制操作。主机必须首先提供五种ROM操作命令之一：1）读ROM，2）符合ROM，3）搜索ROM,4)跳过ROM，5)告警搜索。这些命令对每一个器件的64位激光ROM 部分进行操作。如果在单线上有许多器件，那么可以挑选出一个特定的器件，并给总线上
的主机指示存在多少器件及其类型。在成功地执行了ROM操作序列之后，可使用贮存2器
和控制操作。然后主机可以提供六种存贮器和操作命令之一。
一个操作命令指示DS18B20完成温度测量。改测量的结果放入DS18B20的高速暂存存贮器，通过发出读暂存存储器内容的存储器操作命令可以读出此结果。每一温度告警触发器TH和TL构成一个字节的EPROM。如果不对DS18B20施加告警搜索命令，这些寄存器用作通用用户存储器。使用存储器操作命令可以写TH和TL。对这些寄存器的读访问通过便簮存储器。所以数据均以最低有效位在前的方式被读写。
单线总线系统
单线总线是一种具有一个总线主机和一个或若干个从机的系统。DS18B20起从机的作用。这种总线系统的讨论分为三个题目:硬件接法，处理顺序，以及单线信号（信号类型与定时）。
硬件接法
根据定义，单线总线只有一根线：这一点很重要的，即线上的第一个器件能在适当的时间驱动该总线。为了做到这一点第一个连接到总线上的器件必须具有漏极开路或三态输出。DS18B20的单线接口。多站总线由单线总线和多个与之相连的从属器件组成。单线总线要求近似等于5 k.
单线总线的空闲状态是高电平。不管任何原因，如果执行需要被挂起，那么，若要重新恢复执行，总线必须保持在空闲状态。如果不满足这一点且总线保持在低电平时间大于480微秒，那么总线上所有的器件均被复位。
硬件连接图
处理顺序
经过单线总线接口访问DS18B20的协议如下：
初始化
ROM操作命令
存贮器操作命令
处理/数据
初始化
单线总线上的所有处理均从初始化序列开始。初始化序列包括总线主机发出一复位脉冲，接着由从属器件送出存在脉冲。
ROM操作命令
一旦总线主机检测到从属器件的存在，他便可以发出器件ROM操作命令之一。所有ROM 操作命令均由8位长，这些命令列表如下：
读ROM [33H]
此命令允许总线主机读DS18B20的8位产品系列编码，唯一的48位序列号，以及8位的CRC。此命令只能在总线上仅有一个DS18B20得情况下可以使用。如果总线上存在多于一个得从属器件，那么所有从片企图同时发送时将发生数据冲突的现象。
符合ROM [55h]
符合ROM命令。后继以64位的ROM数据序列，允许总线主机对多点总线上的DS18B20寻址。只有与64位ROM序列严格相符的DS18B20才能对后继的存贮器操作命令作出响应。所有与64位ROM序列不符的从片将等待复位脉冲。此命令在总线数据上有单个或多个器件的情况下均可使用。
跳过ROM[CCh]
在单点总线系统中，此命令通过允许总线主机不提供64位ROM编码而访问存储器操作来节省时间。如果在总线上存在多于一个得从属器件而且在跳过ROM命令之后发出读命令，那么由于多个从片同时发送数据，会在总线上发生数据冲突
搜索ROM[F0h]
当系统开始工作时，总线主机可能不知道单线总线上的器件个数或者不知道其64位ROM编码。搜索ROM命令允许总线主机使用一种消去处理来识别总线上的所有从片的64位ROM编码。
告警搜索[ECh]
此命令的流程与搜索ROM命令相同。但是，仅在最近一次温度测量出现告警的情况下，DS18B20才对此命令作出响应。告警的条件定义为温度高于TH或低于TL。只要DS18B20一上电，告警条件就保持在设置状态，直到另一次温度测量告警。
ROM搜索举例
ROM搜索过程是简单三步过程的重复：读一位，读核位的补码，然后写所需的那一位的值。总线主机在ROM的每一位上完成这一简单的三步过程。在全部过程完成之后，总线主机便知道一个器件中ROM的内容，器件中其余的数以及他们的ROM编码可以游另外一个过程来识别。
以下ROM搜索过程的例子假设四个不同的器件连接到同一条单线总线上。四个器件的ROM数据如下所示：
ROM1 00110101…
ROM2 10101010…
ROM3 11110101…
ROM4 00010001…
搜索过程如下：
1.总线主机通过发出复位脉冲开始初始化序列，从属器件通过发出同时的存在脉冲作出响应。
2.然后总线主机在单线总线上发出搜索人ROM命令。
3.总线主机从单线过程中读一位。每一器件通过把他们各自ROM数据的第一位的值放到单线总线上来作出响应。ROM1和ROM4:将把一个0放在单线总线上，即，把它拉至低电平。ROM2和3通过使总线停留在高电平而把1放在单线总线上。结果是线上所有器件的逻辑与，因此总线主机接收到一个0.总线主机读另一位。因此搜索ROM数据命令正在执行，所以单线总线上所有器件通过把各自ROM数据第一位的补码放到单线总线上来对这第二个读作出响应。ROM1和ROM2把1放在单总线上，使之处于高电平。ROM2和ROM3把0放在单线上，因此他将被拉至低电平。对于第一个ROM数据位的补码总线主机观察到得仍是一个0.总线主机便可决定单线总线上有一些第一位为0的器件和一些第一位为1的器件。
4.总线主机写一个0.在这次搜索过程的其余部分，将不选择ROM2和ROM3，仅留下连接到单线总线的ROM1和ROM4。
5.总线主机再执行两次读，并在一个1位之后接收到一个0位，这表示所有还连接在总线上的器件的第二个ROM数据位为0.
6.总线主机接着写一个0，使ROM1和ROM4二者保持连接。
7.总线主机执行两次连读，并接收到两次0数据位。这表示连接着的器件ROM数据的第三位都是1数据位和0数据位。
8.总线主机写一个数据位。这将不选择ROM1而把ROM4作为唯一仍连接着的器件加以
保留。
9.总线主机读ROM4的ROM数据位的剩余部分，而且访问需要的部件。这就完成了第一个过程并且唯一的识别单线总线上的部件。
10.总线主机通过重复步骤1至7开始一个新的ROM搜索序列。
11.总线主机写一个1，这将不与ROM4发生联系，而唯一的与ROM1仍保持着联系。
12.总线主机对于ROM1读出ROM位的剩余部分而且，如果需要的话，与内部逻辑通信。这就完成了第二个ROM搜索过程，在其中ROM中的另一个被找到。
13.总线主机通过重复步骤1至3开始一次新的ROM搜索。
注意下述内容：
在第一次ROM搜索过程中，总线主机知道一个单线器件的唯一的ID号。取得部件唯一ROM编码的时间为：
960us+(8+3×64)us=13.16ms
因此总线主机每秒钟能够识别75个不同的单线器件。
单片机简介
单片机又称单片微控制器，它不是完成某一个逻辑功能的芯片，而是把一个计算机系统集成到一个芯片上。概括的讲：一块芯片就成了一台计算机。它的体积小、质量轻、价格便宜、为学习、应用和开发提供了便利条件。同时，学习使用单片机是了解计算机原理与结构的最佳选择。
单片机内部也用和电脑功能类似的模块，比如CPU，内存，并行总线，还有和硬盘作用相同的存储器件，不同的是它的这些部件性能都相对我们的家用电脑弱很多，不过价钱也是低的，一般不超过10元即可，用它来做一些控制电器一类不是很复杂的工作足矣了。我们现在用的全自动滚筒洗农机、排烟罩、VCD等等的家电里面都可以看到它的身影！它主要是作为控制部分的核心部件。
它是一种存线式实时控制计算机，在线式就是现场控制，需要的是有较强的抗干扰能力，较低的成本，这也是和离线式计算机的（比如家用PC）的主要区别。
单片机是靠程序的，并且可以修改。通过不同的程序实现不同的功能，尤其是特殊的独特的一些功能，这是别的器件需要费很多人力气才能做到的，有些则是花人力气也很难做到的。一个不是很复杂的功能要是用美同50年代开发的74系列，或者60年代的CD4000系列这些纯硬件来搞定的话，电路一定是一块大PCB板！但是如果要是用美国70年代成功投放市场的系列单片机，结果就会有天壤之别！只因为单片机的通过你编写的程序可以实现高科能，高效率，以及高可靠性！
CPU(中央处理单元)是数字计算机的重要组成部分，其目的是对从内存中接收的指令进行译码，同时对存储于内部寄存器、存储器或输入输出接口单元的数据惊醒传输、算术运算、逻辑运算以及控制运算。在外部，CPU位转换指令数据和控制信息提供一个或多个总线并从组件连接到它。一个微控制器出现在普通电脑的键盘和检测器中，但是这些组件也被屏蔽。在这种微控制器中，与我们所讨论的CPU可能不同。字长也许更短，编制数量少，指令集有限。相对而言，性能差，但对完成任务来说足够了。最重要的是它的微控制器的成本很低，符合成本效应。
由于单片机对成本是敏感的，所以目前占统治地位的软件还是最低级汇编语言，它是除了二进制机器码以上最低级的语言了，既然这么低级为什么还要用呢？很多高级的语言已经达到了可视化编程的水平为什么不用呢？原因简单，就是单片机没有家用计算机那样的CPU，也没有像硬盘那样的海量存储设备。一个可视化高级语言编写的小程序里面即使只有一个按钮，也会达到几十K的尺寸！对于家用PC的硬盘来讲没什么，可是对于单片机来讲是不能接受的。单片机在硬件资源方面的利用率必须很高才行，所以汇编虽然原始却还是在大量使用。一样的道理，如果把巨型计算机上的操作系统和应用软件拿到家用PC 上来运行，家用PC的也是承受不了的。
可以说，二十世纪跨越了三个“电”的时代，即电气时代、电子时代和现已进入的电脑时代。不过，这种电脑，通常是指个人计算机，简称PC机。它白主机、键盘、显示器等组成。还有一类计算机，人多数人却不怎么熟悉。这种计算机就是把智能赋予各种机械的单片机（亦称微控制器）。顾名思义，这种计算机的最小系统只用了一片集成电路，即可进行简单运算和控制。因为它体积小，通常都藏在被控机械的“肚子”里。它在整个装置中，起着有如人类头脑的作用，它出了毛病，整个装置就瘫痪了。现在，这种单片机的使用领域已十分广泛，如科能仪表、实时T控、通讯设备、导航系统、家用电器等。各种产品。一旦用上了单片机，就能起到使产品升级换代的功效，常在产品名称前冠以形容词一一“智能型”，如智能型洗衣机等。现在有些工厂的技术人员或其它业余电子开发者搞出来的某些产品，不是电路太复杂，就是功能太简单且极易被仿制。究其原因，可能就卡在产品未使用单片机或其它可编程逻辑器件上。
【经济类文献翻译】电子商务
电子商务 电子商务（Electronic Commerce）是在Internet开放的网络环境下，基于浏览器/服务器应用方式，实现消费者的网上购物、商户之间的网上交易和在线电子支付的一种新型的商业运营模式 Internet上的电子商务可以分为三个方面：信息服务、交易和支付。主要内容包括：电子商情广告；电子选购和交易、电子交易凭证的交换；电子支付与结算以及售后的网上服务等。主要交易类型有企业与个人的交易(BtoC方式)和企业之间的交易(BtoB方式)两种。参与电子商务的实体有四类：顾客(个人消费者或企业集团)、商户(包括销售商、制造商、储运商)、银行(包括发卡行、收单行)及认证中心。 电子商务是Internet爆炸式发展的直接产物，是网络技术应用的全新发展方向。Internet本身所具有的开放性、全球性、低成本、高效率的特点，也成为电子商务的内在特征，并使得电子商务大大超越了作为一种新的贸易形式所具有的价值，它不仅会改变企业本身的生产、经营、管理活动，而且将影响到整个社会的经济运行与结构。 1．电子商务将传统的商务流程电子化、数字化，一方面以电子流代替了实物流，可以大量减少人力、物力，降低了成本；另一方面突破了时间和空间的限制，使得交易活动可以在任何时间、任何地点进行，从而大大提高了效率。 2．电子商务所具有的开放性和全球性的特点，为企业创造了更多的贸易机会。 3．电子商务使企业可以以相近的成本进入全球电子化市场，使得中小企业有可能拥有和大企业一样的信息资源，提高了中小企业的竞争能力。 4．电子商务重新定义了传统的流通模式，减少了中间环节，使得生产者和消费者的直接交易成为可能，从而在一定程度上改变了整个社会经济运行的方式。 5．电子商务一方面破除了时空的壁垒，另一方面又提供了丰富的信息资源，
中英文文献翻译
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Component-based Safety Computer of Railway Signal Interlocking System 1 Introduction Signal Interlocking System is the critical equipment which can guarantee traffic safety and enhance operational efficiency in railway transportation. For a long time, the core control computer adopts in interlocking system is the special customized high-grade safety computer, for example, the SIMIS of Siemens, the EI32 of Nippon Signal, and so on. Along with the rapid development of electronic technology, the customized safety computer is facing severe challenges, for instance, the high development costs, poor usability, weak expansibility and slow technology update. To overcome the flaws of the high-grade special customized computer, the U.S. Department of Defense has put forward the concept：we should adopt commercial standards to replace military norms and standards for meeting consumers’demand [1]. In the meantime, there are several explorations and practices about adopting open system architecture in avionics. The United Stated and Europe have do much research about utilizing cost-effective fault-tolerant computer to replace the dedicated computer in aerospace and other safety-critical fields. In recent years, it is gradually becoming a new trend that the utilization of standardized components in aerospace, industry, transportation and other safety-critical fields. 2 Railways signal interlocking system 2.1 Functions of signal interlocking system The basic function of signal interlocking system is to protect train safety by controlling signal equipments, such as switch points, signals and track units in a station, and it handles routes via a certain interlocking regulation. Since the birth of the railway transportation, signal interlocking system has gone through manual signal, mechanical signal, relay-based interlocking, and the modern computer-based Interlocking System. 2.2 Architecture of signal interlocking system Generally, the Interlocking System has a hierarchical structure. According to the function of equipments, the system can be divided to the function of equipments; the system
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at89c52单片机中英文资料对照外文翻译文献综述
at89c52单片机简介 中英文资料对照外文翻译文献综述 A T89C52 Single-chip microprocessor introduction Selection of Single-chip microprocessor 1. Development of Single-chip microprocessor The main component part of Single-chip microprocessor as a result of by such centralize to be living to obtain on the chip，In immediate future middle processor CPU。Storage RAM immediately﹑memoy read ROM﹑Interrupt system、Timer /'s counter along with I/O's rim electric circuit awaits the main microcomputer section，The lumping is living on the chip。Although the Single-chip microprocessor r is only a chip，Yet through makes up and the meritorous service be able to on sees，It had haveed the calculating machine system property，calling it for this reason act as Single-chip microprocessor r minisize calculating machine SCMS and abbreviate the Single-chip microprocessor。 1976Year the Inter corporation put out 8 MCS－48Set Single-chip microprocessor computer，After being living more than 20 years time in development that obtain continuously and wide-ranging application。1980Year that corporation put out high performance MCS －51Set Single-chip microprocessor。This type of Single-chip microprocessor meritorous service capacity、The addressing range wholly than early phase lift somewhat，Use also comparatively far more at the moment。1982Year that corporation put out the taller 16 Single-chip microprocessor MCS of performance once
电子信息工程文献专业英语中英互译
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a ," , , , . a ( , , , ). . . , , a . $50 . Birmingham, England, 2000. 1995, Delphi, 7596 . 37 10 , . a . , a a , a , a , a a a . a a , a . , , . , , , . a , , , . , , a . : . . 电子动力转向系统 电子动力转向系统是什么? 电子动力转向系统是通过一个电动机来驱动动力方向盘液压泵或直接驱动转向联动装置。电子动力转向的功能由于不依赖于发动机转速，所以能节省能源电子动力转向系统是怎么运行？： 传统的动力方向盘系统使用一条引擎辅助传送带驾驶气泵，提供操作在动力方向盘齿轮或作动器的一个活塞协助驱动的被加压的流体。在电动液压的控制，一个电子动力方向盘包括一台电动机控制的一个高效率泵浦。由一个电控制器调控泵浦压力和流速来控制泵浦的速度，为不同的驾驶路况的提供转向。泵浦可以在汽车行驶低速时关闭以提供节能（在当代的世界市场上)。 电动控制转向使用电动机通过齿轮齿条机构直接连接以达到转向控制（无泵或液体）。多个电机驱动器和多驱动控制的实现是可能的。一个微处理器控制转向动态和驱动的工作。输入因子包括车速，转向，车轮扭矩，角度位置和转率。
外文翻译中英对照版
VOLUME 30 ISSUE 2 October 2008 Journal of Achievements in Materials and Manufacturing Engineering Copyright by International OCSCO World Press. All rights reserved.2008 151 Research paper 2008年十月期2卷30 材料与制造工程成果期刊 版权所有：国际OCSCO 世界出版社。一切权利保有。2008 ？？151研究论文 1. Introduction Friction stir welding (FSW) is a new solid-state welding method developed by The Welding Institute (TWI) in 1991 [1]. The weld is formed by the excessive deformation of the material at temperatures below its melting point, thus the method is a solid state joining technique. There is no melting of the material, so FSW has several advantages over the commonly used fusion welding techniques [2-10]. 1.导言摩擦搅拌焊接（FSW）是焊接学？会于1991年研发的一种新型固态焊接方法。这种焊接？是由材料在低于其熔点的温度上过量变形形成，因此此技术是一种固态连接技术。材料不熔化，所以FSW 相比常用的熔化焊接技术有若干优势。例如，在焊接区无多孔性或破裂，工件（尤其薄板上）没有严重扭曲，并且在连接过程中不需要填料、保护气及昂贵的焊接准备there is no significant distortion of the workpieces (particularly in thin plates), and there is no need for filler materials, shielding gases and costly weld preparation during this joining process. FSW被认为是对若干材料例如铝合金、镁合金、黄铜、钛合金及钢最显著且最有潜在用途的焊接技术FSW is considered to be the most remarkable and potentially useful welding technique for several materials, such as Al-alloys, Mg-alloys, brasses, Ti-alloys, and steels [1-16]. 然而，在FSW过程中，用不合适的焊接参数能引起连接处失效，并且使FSW连接处的力学性能恶化。However, during FSW process using inappropriate welding parameters can cause defects in the joint and deteriorate the mechanical properties of the FSW joints [2, 3]. 此技术起初就主要是为低熔点材料如铝合金、镁合金及铜合金而广泛研究的。The technique has initially been widely investigated for mostly low melting materials, such as Al, Mg and Cu alloys. 此技术已被证明是很有用的，尤其在连接用于航空航天用途的如高合金2XXX及7XXX系列铝合金等难熔高强度的铝合金。It has proven to be very useful, particularly in the joining of the difficult-to-fusion join high strength Al-alloys used in aerospace applications, such as highly alloyed 2XXX and 7XXX series aluminium alloys. 做出Al-5086 H32型板摩擦搅拌对焊的高强度、抗疲劳及断裂的力学性能？。The difficulty of making high-strength, fatigue and fracture resistant Mechanical properties of friction stir butt-welded Al-5086 H32 plate G. .am a,*, S. Gü.lüer b, A. .akan c, H.T. Serinda. a a Mustafa Kemal University, Faculty of Engineering and Architecture, 31040 Antakya, Turkey a 土耳其安塔卡亚31040，Mustafa Kemal大学建筑工程系 b General Directorate of Highways of Turkey, Ankara, Turkey b 土耳其安卡拉土耳其高速公路总理事会？ c Abant Izzet Baysal University, Faculty of Engineering an d Architecture, 14280 Bolu, Turkey c 土耳其Bolu 14280 Abant Izzet Baysal 大学建筑工程系 * Corresponding author: E-mail address: gurelcam@https://www.360docs.net/doc/b67385788.html, *相关作者电子邮箱地址：gurelcam@https://www.360docs.net/doc/b67385788.html, Received 30.06.2008; published in revised form 01.10.2008
英文论文及中文翻译
International Journal of Minerals, Metallurgy and Materials Volume 17, Number 4, August 2010, Page 500 DOI: 10.1007/s12613-010-0348-y Corresponding author: Zhuan Li E-mail: li_zhuan@https://www.360docs.net/doc/b67385788.html, ? University of Science and Technology Beijing and Springer-Verlag Berlin Heidelberg 2010 Preparation and properties of C/C-SiC brake composites fabricated by warm compacted-in situ reaction Zhuan Li, Peng Xiao, and Xiang Xiong State Key Laboratory of Powder Metallurgy, Central South University, Changsha 410083, China (Received: 12 August 2009; revised: 28 August 2009; accepted: 2 September 2009) Abstract: Carbon fibre reinforced carbon and silicon carbide dual matrix composites (C/C-SiC) were fabricated by the warm compacted-in situ reaction. The microstructure, mechanical properties, tribological properties, and wear mechanism of C/C-SiC composites at different brake speeds were investigated. The results indicate that the composites are composed of 58wt% C, 37wt% SiC, and 5wt% Si. The density and open porosity are 2.0 g·cm–3 and 10%, respectively. The C/C-SiC brake composites exhibit good mechanical properties. The flexural strength can reach up to 160 MPa, and the impact strength can reach 2.5 kJ·m–2. The C/C-SiC brake composites show excellent tribological performances. The friction coefficient is between 0.57 and 0.67 at the brake speeds from 8 to 24 m·s?1. The brake is stable, and the wear rate is less than 2.02×10?6 cm3·J?1. These results show that the C/C-SiC brake composites are the promising candidates for advanced brake and clutch systems. Keywords: C/C-SiC; ceramic matrix composites; tribological properties; microstructure [This work was financially supported by the National High-Tech Research and Development Program of China (No.2006AA03Z560) and the Graduate Degree Thesis Innovation Foundation of Central South University (No.2008yb019).] 温压-原位反应法制备C / C-SiC刹车复合材料的工艺和性能 李专，肖鹏，熊翔 粉末冶金国家重点实验室，中南大学，湖南长沙410083，中国（收稿日期：2009年8月12日修订：2009年8月28日;接受日期：2009年9月2日） 摘要：采用温压?原位反应法制备炭纤维增强炭和碳化硅双基体(C/C-SiC)复合材