EDI2GG41864V95D中文资料

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EDI2GG41864V
576 Kilobyte Synchronous Card Edge DIMM
FEATURES
? ? ? ? ? ? ? ? ? ? ? ? ? ? 4x64Kx18 Synchronous Flow-Through Architecture Clock Controlled Registered Bank Enables (E1\, E2\, E3, E4\) Clock Controlled Registered Address Clock Controlled Registered Global Write (GW\) Aysnchronous Output Enable (G\) Internally self-timed Write Gold Lead Finish 3.3V+ 10%, -5% Operation Access Speed(s): TKHQV=9.5, 10, 11, 12, 15ns Common Data I/O High Capacitance (30pf) drive, at rated Access Speed Single total array Clock Multiple Vcc and Gnd The EDI2KG41864VxxD2 is a Synchronous SRAM, 60 position Card Edge DIMM (120 contacts) Module, organized as 4x64Kx18. The Module contains four (4) Synchronous Burst Ram Devices, packaged in the industry standard JEDEC 14mmx20mm TQFP placed on a Multilayer FR4 Substrate. The module architecture is defined as a Synchronous Only, Flow-Through, Early Write device. This module provides high performance, ultra fast access times at a cost per bit benefit over BiCMOS Asynchronous SRAM based devices. As well as improved cost per bit, the use of Synchronous or Synchronous Burst devices or modules can ease the memory subsystem design by reducing or easing the memory controller requirement. Synchronous operations are in relation to an externally supplied clock, registered address, registered global write, registered enables as well as an Asynchronous Output enable. All read and Write operations to this module are performed on Long Words (Double Words) 32 bit operation. Write cycles are internally self timed and are initiated by a rising clock edge. This feature relieves the designer the task of developing external write pulse width circuitry.
PIN NAMES
DQ0-DQ17 A0-A15 E1\, E2\, E3\, E4\ Clk GW\ G\ Vcc Vss Input/Output Bus Address Bus Synchronous Bank Enables Array Clock Synchronous Global write Enable Asynchronous Output Enable 3.3V Power Supply Gnd
White Electronic Designs Corporation ? Westborough, MA 01581 ? (508) 366-5151 https://www.360docs.net/doc/f313203114.html,
1
J u l y1999 Rev ECO

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EDI2GG41864V
PIN CONFIGURATION
White Electronic Designs Corporation ? Westborough, MA 01581 ? (508) 366-5151 https://www.360docs.net/doc/f313203114.html,
2
July 1999 Rev
ECO

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EDI2GG41864V
FUNCTIONAL BLOCK DIAGRAM
White Electronic Designs Corporation ? Westborough, MA 01581 ? (508) 366-5151 https://www.360docs.net/doc/f313203114.html,
3
J u l y1999 Rev ECO

元器件交易网https://www.360docs.net/doc/f313203114.html,
EDI2GG41864V
PIN DESCRIPTIONS
DIMM Pins Symbol 3, 5, 7, 9, 13, 15, A0-A17 17, 19, 23, 20, 18, 16, 14, 10, 8, 6 38 GW\
Type Input Synchronous Input Synchronous Input Synchronous Input Synchronous Input Input/Output
27
CLK
36, 32, 35, 31 37 Various
E1\, E2\ E3\, E4\ G\ DQ0-63
Various Various
Vcc Vss
Supply Ground
Description Addresses: These inputs are registered and must meet the setup and hold times around the rising edge of CLK. The burst counter generates internal addresses associated with A0 and A1, during burst and wait cycle. Global Write: This active LOW input allows a full 72-bit WRITE to occur independent of the BWE\ and BWx\ lines and must meet the setup and hold times around the rising edge of CLK. Clock: This signal registers the addresses, data, chip enables, write control and burst control inputs on its rising edge. All synchronous inputs must meet setup and hold times around the clock’s rising edge. Bank Enables: These active LOW inputs are used to enable each individual bank and to gate ADSP\. Output Enable: This active LOW asynchronous input enables the data output drivers. Data Inputs/Outputs: First byte is DQ0-7, second byte is DQ8-15, third byte is DQ16-23, fourth byte is DQ24-31, fifth byte is DQ32-39, sixth byte is DQ40-47, seventh byte is DQ48-55 and the eight byte is DQ56-64. Core power supply: +3.3V -5%/+10% Ground
White Electronic Designs Corporation ? Westborough, MA 01581 ? (508) 366-5151 https://www.360docs.net/doc/f313203114.html,
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July 1999 Rev
ECO

元器件交易网https://www.360docs.net/doc/f313203114.html,
EDI2GG41864V
SYNCHRONOUS ONLY - TRUTH TABLE
Operation Synchronous Write-Bank 1 Synchronous Read-Bank 1 Synchronous Write-Bank 2 Synchronous Read-Bank 2 Synchronous Write-Bank 3 Synchronous Read-Bank 3 Synchronous Write-Bank 4 Synchronous Read-Bank 4 E1\ L L H H H H H H E2\ H H L L H H H H E3\ H H H H L L H H E4\ H H H H H H L L GW\ L H L H L H L H G\ H L H L H L H L CLK DQ High-Z High-Z High-Z High-Z
ABSOLUTE MAXIMUM RATINGS*
Voltage on Vcc Relative to Vss -0.5V to +4.6V Vin -0.5V to Vcc +0.5V Storage Temperature -55°C to +125°C Operating Temperature (Commercial) 0°C to +70°C Operating Temperature (Industrial) -40°C to +85°C Short Circuit Output Current 20 mA
*Stress greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions greater than those indicated in operational sections of this specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS
Parameter Supply Voltage Supply Voltage Input High Input Low Input Leakage Output Leakage Output High IOH=-4mA Output Low IOL =+8mA Sym VCC VSS VIH VIL ILi ILo VOH VOL Min Typ Max Units 3.14 3.3 3.6 V 0.0 0.0 0.0 V 2.2 3.0 VCC+0.3 V -0.3 0.0 0.8 V -2 1 2 μA -2 1 2 μA 2.4 V 0.4 V
DC ELECTRICAL CHARACTERISTICS - READ CYCLE
Description Power Supply Current Power Supply Current
Device Selected,No Operation
SYM Icc1 Icc
Typ 380 100 10 20 300
Max 9.5 10 11 12 15 * 450 400 375 350 * 200 200 225 225 * * * 15 15 15 15 35 35 35 35 400 400 300 300
Units mA mA mA mA mA
Snooze Mode IccZZ CMOS Standby Icc3 Clock Running-Deselect IccK
*TBD
AC TEST CONDITIONS
Input Pulse Levels Input and Output Timing Ref. Output Test equivalencies Vss to 3.0V 1.25V
DQ
AC TEST LOAD
Z0 = 50 ?
50? Vt = 1.25V
Fig. 1 Output Load Equivalent
White Electronic Designs Corporation ? Westborough, MA 01581 ? (508) 366-5151 https://www.360docs.net/doc/f313203114.html,
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J u l y1999 Rev ECO

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EDI2GG41864V
READ CYCLE TIMING PARAMETERS
Description Clock Cycle Time Clock High Time Clock Low Time Clock to Output Valid Clock to Output Invalid Clock to Output Low-Z Output Enable to Output Valid Output Enable to Output Low-Z Output Enable to Output High-Z Address Setup Bank Enable Setup Address Hold Bank Enable Hold
*TBD
9.5ns Sym Min Max tKhKh * * tKHKL * * tKLKH * * tKHQV * * tKHQX1 * * tKHQX * * tGLQV * * tGLQX * * tGHQZ * * tAVKH * * tEVKH * * tKHAX * * tKHEX * *
10ns Min Max 12 5 5 10 3 2 4 0 4 2.5 2.5 1.0 1.0
11ns Min Max 12 5 5 11 3 2 5 0 5 2.5 2.5 1.0 1.0
12ns Min Max 15 5 5 12 3 2 5 0 5 2.5 2.5 1.0 1.0
15ns Min Max 20 6 6 15 3 2 6 0 6 2.5 2.5 1.0 1.0
Units ns ns ns ns ns ns ns ns ns ns ns ns ns
White Electronic Designs Corporation ? Westborough, MA 01581 ? (508) 366-5151 https://www.360docs.net/doc/f313203114.html,
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July 1999 Rev
ECO

元器件交易网https://www.360docs.net/doc/f313203114.html,
EDI2GG41864V
SYNCHRONOUS READ CYCLE
Ex\
G\
WRITE CYCLE TIMING PARAMETERS
9.5ns Min Max * * * * * * * * * * * * * * * * * * * * * * 10ns Min Max 12 5 5 2.5 1.0 2.5 1.0 2.5 1.0 2.5 1.0 11ns Min Max 12 5 5 2.5 1.0 2.5 1.0 2.5 1.0 2.5 1.0 12ns Min Max 15 5 5 2.5 1.0 2.5 1.0 2.5 1.0 2.5 1.0 15ns Min Max 20 6 6 2.5 1.0 2.5 1.0 2.5 1.0 2.5 1.0
Description Clock Cycle Time Clock High Time Clock Low Time Address Setup Address Hold Bank Enable Setup Bank Enable Hold Global Write Enable Setup Global Write Enable Hold Data Setup Data Hold
*TBD
Sym tKHKH tKHKL tKLKH tAVKH tKHAX tEVKH tKHEX tWVKH tKHWX tDVKH tKHDX
Units ns ns ns ns ns ns ns ns ns ns ns
White Electronic Designs Corporation ? Westborough, MA 01581 ? (508) 366-5151 https://www.360docs.net/doc/f313203114.html,
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J u l y1999 Rev ECO

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EDI2GG41864V
SYNC WRITE CYCLE
Ex\
SYNC READ/WRITE CYCLE
White Electronic Designs Corporation ? Westborough, MA 01581 ? (508) 366-5151 https://www.360docs.net/doc/f313203114.html,
8
July 1999 Rev
ECO

元器件交易网https://www.360docs.net/doc/f313203114.html,
EDI2GG41864V
PACKAGE DESCRIPTION Package No. 436 120 Lead Card Edge DIMM
Ordering Information
Part Number EDI2GG41864V95D* EDI2GG41864V10D* EDI2GG41864V11D EDI2GG41864V12D EDI2GG41864V15D
*Consult Factory for Availability
Organization 4x64Kx18 4x64Kx18 4x64Kx18 4x64Kx18 4x64Kx18
Voltage 3.3 3.3 3.3 3.3 3.3
Speed (ns) 9.5 10 11 12 15
Package 120 Card Edge DIMM 120 Card Edge DIMM 120 Card Edge DIMM 120 Card Edge DIMM 120 Card Edge DIMM
White Electronic Designs Corporation ? Westborough, MA 01581 ? (508) 366-5151 https://www.360docs.net/doc/f313203114.html,
9
J u l y1999 Rev ECO

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