基于单片机的温度控制系统外文翻译

外文原文：

Design of the Temperature Control System Based on A T89C51

ABSTRACT

The principle and functions of the temperature control sy stem based on micro controller AT89C51 are studied, and the temperature measurement unit consists of the 1-Wire bus dig ital temperature sensor DS18B20. The system can be expected to detect the preset temperature, display time and save moni toring data. An alarm will be given by system if the tempe rature exceeds the upper and lower limit value of the tempe rature which can be set discretionarily and then automatic c ontrol is achieved, thus the temperature is achieved monitori ng intelligently within a certain range. Basing on principle of the system, it is easy to make a variety of other no n-linear control systems so long as the software design is reasonably changed. The system has been proved to be accurat e, reliable and satisfied through field practice.

KEYWORDS: AT89C51; micro controller; DS18B20; temperat ure 1 INTRODUCTION

Temperature is a very important parameter in human life. In the modern society, temperature control (TC) is not onl y used in industrial production, but also widely used in ot her fields. With the improvement of the life quality, we ca n find the TC appliance in hotels, factories and home as w ell. And the trend that TC will better serve the whole soc iety, so it is of great significance to measure and control the temperature. Based on the AT89C51 and temperature senso r DS18B20, this system controls the condition temperature int elligently. The temperature can be set discretionarily within a certain range. The system can show the time on LCD, an

d sav

e monitoring data; and automatically control the tempera ture when the condition temperature exceeds the upper and lo wer limit value. By doing so it is to keep the temperature unchanged. The system is o

f high anti-jamming, high control precision and flexible design; it also fits the rugged env ironment. It is mainly used in people's life to improve the quality of the work and life. It is also versatile, so t hat it can be convenient to extend the use of the system. So the design is of profound importance. The general desi

g n, hardware design and software design of the system are co vered.

Introduction

The 8-bit AT89C51 CHMOS microcontrollers are designed to hand le high-speed calculations and fast input/output operations. M CS 51 microcontrollers are typically used for high-speed even t control systems. Commercial applications include modems, mot or-control systems, printers, photocopiers, air conditioner con trol systems, disk drives, and medical instruments. The autom otive industry use MCS 51 microcontrollers in engine-control systems, airbags, suspension systems, and antilock braking sys tems (ABS). The AT89C51 is especially well suited to applica tions that benefit from its processing speed and enhanced on -chip peripheral functions set, such as automotive power-train control, vehicle dynamic suspension, antilock braking, and s tability control applications. Because of these critical appli cations, the market requires a reliable cost-effective control ler with a low interrupt latency response, ability to servic e the high number of time and event driven integrated perip herals needed in real time applications, and a CPU with abo ve average processing power in a single package. The financi al and legal risk of having devices that operate unpredictab ly is very high. Once in the market, particularly in missio n critical applications such as an autopilot or anti-lock br aking system, mistakes are financially prohibitive. Redesign c osts can run as high as a $500K, much more if the fix me

ans 2 back annotating it across a product family that share the same core and/or peripheral design flaw. In addition, field replacements of components is extremely expensive, as t he devices are typically sealed in modules with a total val ue several times that of the component. To mitigate these p roblems, it is essential that comprehensive testing of the c ontrollers be carried out at both the component level and s ystem level under worst case environmental and voltage condit ions. This complete and thorough validation necessitates not only a well-defined process but also a proper environment an d tools to facilitate and execute the mission successfully. Intel Chandler Platform Engineering group provides post silico n system validation (SV) of various micro-controllers and pro cessors. The system validation process can be broken into th ree major parts. The type of the device and its application requirements determine which types of testing are performed on the device.

The AT89C51 provides the following standard features

4Kbytes of Flash, 128 bytes of RAM, 32 I/O lines, two 16-b ittimer/counters, a five vector two-level interrupt architectur e, a full duple ser-ial port, on-chip oscillator and clock circuitry. In addition, the AT89C51 is designed with static logic for operation down to zero frequency and supports tw o software selectable power saving modes. The Idle Mode stop s the CPU while allowing the RAM, timer/counters, serial por t and interrupt sys -tem to continue functioning. The Power-down Mode saves

the RAM contents but freezes the oscil–lator disabling all other chip functions until the next hardware reset.

Description

VCC Supply voltage.

GND Ground.

Port 0：Port 0 is an 8-bit open-drain bi-directional I/O port. As a n output port, each pin can sink eight TTL inputs. When 1s

are written to port 0 pins, the pins can be used as hig h impedance inputs. Port 0 may also be configured to be th e multiplexed low order address/data bus during accesses to external program and data memory. In this mode P0 has inter nal pull ups. Port 0 also receives the code bytes during F lash programming, and outputs the code bytes during program verification. External pull ups are required during program v erification.

Port 1：Port 1 is an 8-bit bi-directional I/O port with internal pu ll ups. The Port 1 output buffers can sink/so -urce four T TL inputs. When 1s are written to Port 1 pins they are pu lled high by the internal pull ups and can be used as inp uts. As inputs, Port 1 pins that are externally being pulle d low will source current (IIL) because of the internal pul lups. Port 1 also receives the low-order address bytes durin g Flash programming and verification.

Port 2：Port 2 is an 8-bit bi-directional I/O port with internal pu ll ups. The Port 2 output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins they are pull ed high by the internal pull ups and can be used as input s. As inputs, Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pull ups. Port 2 emits the high-order address byte during fetch es from external program memory and during accesses to Port 2 pins that are externally being pulled low will source c urrent (IIL) because of the internal pull ups. Port 2 emits the high-order address byte during fetches from external pr ogram memory and during accesses to external data memory tha t use 16-bit addresses (MOVX@DPTR). In this application, it uses strong internal pull-ups when emitting 1s. During access es to external data memory that use 8-bit addresses (MOVX @ RI), Port 2 emits the contents of the P2 Special Function Register. Port 2 also receives the high-order

address bits and some control signals durin Flash programming and verification.

Port 3：Port 3 is an 8-bit bi-directional I/O port with internal pu ll ups. The Port 3 output buffers can sink/sou -rce four T TL inputs. When 1s are written to Port 3 pins they are pu lled high by the internal pull ups and can be used as inp uts. As inputs, Port 3 pins that are externally being pulle d low will source current (IIL) because of the pull ups.

Port 3 also serves the functions of various special features of the AT89C51 as listed below:

RST：Reset input. A high on this pin for two machine cycles whi le the oscillator is running resets the device.

ALE/PROG：Address Latch Enable output pulse for latching the low byte of the address during accesses to external memory. This pi n is also the program pulse input (PROG) during Flash progr amming. In normal operation ALE is emitted at a constant ra te of 1/6 the oscillator frequency, and may be used for ex ternal timing or clocking purposes. Note, however, that one ALE pulse is skipped duri-ng each access to external Data M emory. If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is act

ive only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mo de.

PSEN：Program Store Enable is the read strobe to external program memory. When theAT89C51 is executing code from external pro gram memory, PSEN is activated twice each machine cycle, exc ept that two PSEN activations are skipped during each access to external data memory.

EA/VPP：External Access Enable. EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH. Note, howeve r, that if lock bit 1 is programmed, EA will be internally latched on reset. EA should be strapped to VCC for intern al program executions. This pin alsreceives the 12-volt progr amming enable voltage (VPP) during Flash programming, for par ts that require 12-volt VPP.

XTAL1：Input to the inverting oscillator amplifier and input to the internal clock operating circuit.

XTAL2 ：Output from the inverting oscillator amplifier. Oscillator Cha racteristicsXTAL1 and XTAL2 are the input and output, respect ively, of an inverting amplifier which can be configured for use as an on-chip oscillator, as shown

in Figure 1. Either a quartz crystal or ceramic resonator m ay be used. To drive the device from an external clock sou

rce, XTAL2 should be left unconnected while XTAL1 is driven as shown in Figure are no requirements on the duty cycl e of the external clock signal, since the input to the int ernal clocking circuitry is through a divide-by-two flip-flop, but minimum and maximum voltage high and low time specific ations must be observed. Idle Mode In idle mode, the CPU p uts itself to sleep while all the on chip peripherals remai n active. The mode is invoked by software. The content of the on-chip RAM and all the special functions registers rema in unchanged during this mode. The idle mode can be termina ted by any enabled interrupt or by a hardware reset. It sh ould be noted that when idle is terminated by a hard ware reset, the device normally resumes program execution, from where it left off, up to two machine cycles before the int ernal reset algorithm takes control. On-chip hardware inhibits access to internal RAM in this event, but access to the port pins is not inhibited. To eliminate the possibility of an unexpected write to a port pin when Idle is terminated by reset, the instruction following the one that invokes I dle should not be one that writes to a port pin or to ex ternal memory.

Power-down Mode

In the power-down mode, the oscillator is stopped, and the instruction that invokes power-down is the last instruction e xecuted. The on-chip RAM and Special Function Registers retai n their values until the power-down mode is terminated. The only exit from power-down is a hardware reset. Reset redef ines the SFRS but does not change the on-chip RAM. The res et should not be activated before VCC is restored to its n ormal operating level and must be held active long enough t o allow the oscillator to restart and stabilize. The AT89C51 code memory array is programmed byte-by byte in either pro gramming mode. To program any nonblank byte in the on-chip Flash Memory, the entire memory must be erased using the Ch ip Erase Mode.

2 Programming Algorithm

Before programming the AT89C51, the address, data and control signals should be set up according to the Flash programmin g mode table and Figure 3 and Figure 4. To program the AT 89C51, take the following . Input the desired memory locatio n on the address . Input the appropriate data byte on the data lines. 3. Activate the correct combination of control signals. 4. Raise EA/VPP to 12V for the high-voltage progr amming mode. 5. Pulse ALE/PROG once to program a byte in t he Flash array or the lock bits. The byte-write cycle is s elf-timed and typically takes no .

翻译：

温度控制系统的设计

摘要

研究了基于AT89C51单片机温度控制系统的原理和功能，温度测量单元由单总线数字温度传感器DS18B20构成。该系统可进行温度设定，时间显示和保存监测数据。如果温度超过任意设置的上限和下限值，系统将报警并可以和自动控制的实现，从而达到温度监测智能一定范围内。基于系统的原理，很容易使其他各种非线性控制系统，只要软件设计合理的改变。该系统已被证明是准确的，可靠和满意通过现场

实践。

关键词：单片机；温度；温度

1 导言

温度是在人类生活中非常重要的参数。在现代社会中，温度控制（TC）不仅用于工业生产，还广泛应用于其它领域。随着生活质量的提高，我们可以发现在酒店，工厂和家庭，以及比赛设备。而比赛的趋势将更好地服务于整个社会，因此它具有十分重要的意义测量和控制温度。在AT89C51单片机和温度传感器DS18B20的基础上，系统环境温度智能控制。温度可设定在一定范围内动任意。该系统可以显示在液晶显示屏的时间，并保存监测数据，并自动地控制温度，当环境温度超过上限和下限的值。这样做是为了保持温度不变。该系统具有很高的抗干扰能力，控制精度高，灵活的设计，它也非常适合这个恶劣的环境。它主要应用于人们的生活，改善工作和生活质量。这也是通用的，因此它可以方便地扩大使用该系统。因此，设计具有深刻的重要性。一般的设计，硬件设计和软件系统的设计都包括在内。

介绍

8位AT89C51 CHMOS 工艺单片机被设计用于处理高速计算和快速输入/输出。MCS51 单片机典型的应用是高速事件控制系统。商业应用包括调制解调器，电动机控制系统，打印机，影印机，空调控制系统，磁盘驱动器和医疗设备。汽车工业把MCS51 单片机用于发

动机控制系统，悬挂系统和反锁制动系统。AT89C51 尤其很好适用于得益于它的处理速度和增强型片上外围功能集，诸如：汽车动力控制，车辆动态悬挂，反锁制动和稳定性控制应用。由于这些决定性应用，市场需要一种可靠的具有低干扰潜伏响应的费用-效能控制器，服务大量时间和事件驱动的在实时应用需要的集成外围的能力，具有在单一程序包中高出平均处理功率的中央处理器。拥有操作不可预测的设备的经济和法律风险是很高的。一旦进入市场，尤其任务决定性应用诸如自动驾驶仪或反锁制动系统，错误将是财力上所禁止的。重新设计的费用可以高达500K 美元，如果产品族享有同样内核或外围设计缺陷的话，费用会更高。另外，部件的替代品领域是极其昂贵的，因为设备要用来把模块典型地焊接成一个总体的价值比各个部件高几倍。为了缓和这些问题，在最坏的环境和电压条件下对这些单片机进行无论在部件级别还是系统级别上的综合测试是必需的。Intel Chandler 平台工程组提供了各种单片机和处理器的系统验证。这种系统的验证处理可以被分解为三个主要部分。系统的类型和应用需求决定了能够在设备上执行的测试类型。

AT89C51提供以下标准功能

4k 字节FLASH 闪速存储器，128 字节内部RAM，32 个I/O 口线，2 个16 位定时/计数器，一个5 向量两级中断结构，一个全双工串行通信口，片内振荡器及时钟电路。同时，AT89C51 降至0Hz 的静态逻辑操作，并支持两种可选的节电工作模式。空闲方

式体制CPU 的工作，但允许RAM，定时/计数器，串行通信口及中断系统继续工作。掉电方式保存RAM 中的内容，但振荡器体制工作并禁止其他所有不见工作直到下一个硬件复位。

引脚功能说明

·Vcc：电源电压

·GND：地

·P0 口：P0 口是一组8 位漏极开路型双向I/O 口，也即地址/数据总线复用。作为输出口用时，每位能吸收电流的方式驱动8 个TTL 逻辑门电路，对端口写“1”可作为高阻抗输入端用。在访问外部数据存储器或程序存储器时，这组口线分时转换地址（低8 位）和数据总线复用，在访问期间激活内部上拉电阻。在Flash 编程时，P0 口接受指令字节，而在程序校验时，输出指令字节，校验时，要求外接上拉电阻。

·P1 口：P1 是一个带内部上拉电阻的8 位双向I/O 口，P1 的输出缓冲级可驱动（吸收或输出电流）4 个TTL 逻辑门电路。对端口写“1”，通过内部的上拉电阻把端口拉到高电平，此时可作输入口。作为输入口使用时，因为内部存在上拉电阻，某个引脚被外部信号拉低时会输出一个电流（IIL）。Flash 编程和程序校验期间，P1 接受低8 位地址。

·P2 口：P2 是一个带有内部上拉电阻的8 位双向I/O 口，

P2 的输出缓冲级可驱动（吸收或输出电流）4 个TTL 逻辑门电路。对端口写“1”，通过内部的上拉电阻把端口拉到高电平，此时可作输入口。作为输入口使用时，因为内部存在上拉电阻，某个引脚被外部信号拉低时会输出一个电流（IIL）。在访问外部程序存储器或16 位四肢的外部数据存储器（例如执行MOVX @DPTR指令）时，P2 口送出高8 位地址数据，在访问8 位地址的外部数据存储器（例如执行MOVX @ RI 指令）时，P2 口线上的内容（也即特殊功能寄存器（SFR）区中R2 寄存器的内容），在整个访问期间不改变。Flash 编程和程序校验时，P2 也接收高位地址和其他控制信号。

·P3 口：P3 是一个带有内部上拉电阻的8 位双向I/O 口，P3 的输出缓冲级可驱动（吸收或输出电流）4 个TTL 逻辑门电路。对端口写“1”，通过内部的上拉电阻把端口拉到高电平，此时可作输入口。作为输入口使用时，因为内部存在上拉电阻，某个引脚被外部信号拉低时会输出一个电流（IIL）。P3 口还接收一些用于Flash 闪速存储器编程和程序校验的控制信号。

·RST：复位输入。当振荡器工作时，RST 引脚出现两个机器周期以上高电平将使单片机复位。

·ALE/PROG：当访问外部程序存储器或数据存储器时，ALE（地址锁存允许）输出脉冲用于锁存地址的低8 位字节。即使不访问外部存储器，ALE 仍以时钟振荡频率的1/6 输出固定的正脉冲信号，因

此它可对外输出时钟或用于定时目的。要注意的是，每当访问外部数据存储器时将跳过一个ALE 脉冲。对Flash 存储器编程期间，该引脚还用于输入编程脉冲（PROG）。如有必要，可通过对特殊功能寄存器（SFR）区中的8EH 单元D0 位置位，可禁止ALE 操作。该位置位后，只有一条MOVX 和MOVC 指令ALE 才会被激活。此外，该引脚会被微弱拉高，单片机执行外部程序时，应设置ALE 无效。·PSEN：程序存储允许输出是外部程序存储器的读选通型号，当89C51 由外部存储器取指令（或数据）时，每个机器周期两次PSEN 有效，即输出两个脉冲。在此期间，当访问外部数据存储器，这两次有效的PSEN 信号不出现。

·EA/VPP：外部访问允许。欲使CPU 仅访问外部程序存储器（地址为0000H—FFFFH），EA 端必须保持低电平（接地）。需注意的是：如果加密位LB1 被编程，复位时内部会锁存EA 端状态。如EA 端为高电平（接Vcc 端），CPU 则执行内部程序存储器中的指令。Flash 存储器编程时，该引脚加上+12v 的编程允许电源Vpp，当然这必须是该器件使用12v 编程电压Vpp。

·XTAL1：振荡器反相放大器及内部时钟发生器的输入端。

·XTAL2：振荡器反相放大器的输出端。89C51 中有一个用于构成内部振荡器的高增益反相放大器，引脚XTAL1 和XTAL2分别是该放大器的输入端和输出端。这个放大器与作为反馈元件的片外石英晶体或陶瓷谐振器一起构成自激振荡器，振荡电路参见图5。外接石英晶

体或陶瓷谐振器及电容C1、C2 接在放大器的反馈回路中构成并联振荡电路。对电容C1、C2 虽没有十分严格的要求，但电容容量的大小会轻微影响振荡频率的高低、振荡器工作的稳定性、起振的难易程度及温度稳定性，如果使用石英晶体，我们推荐电容使用30Pf±10 Pf，而如使用陶瓷谐振器建议选择40Pf±10Pf。用户也可以采用外部时钟。这种情况下，外部时钟脉冲接到XTAL1 端，即内部时钟发生器的输入端XTAL2 则悬空。

·掉电模式：

在掉电模式下，振荡器停止工作，进入掉电模式的指令是最后一条被执行的指令，片内RAM 和特殊功能寄存器的内容在终止掉电模式前被冻结。推出掉电模式的唯一方法是硬件复位，复位后将重新定义全部特殊功能寄存器但不改变RAM 中的内容，在Vcc 恢复到正常工作电平前，复位应无效，且必须保持一定时间以使振荡器重启动并稳定工作。89C51 的程序存储器阵列是采用字节写入方式编程的，每次写入一个字符，要对整个芯片的EPROM 程序存储器写入一个非空字节，必须使用片擦除的方法将整个存储器的内容清楚。

2 编程方法

编程前，设置好地址、数据及控制信号，编程单元的地址加在P1 口和P2 口的—（11 位地址范围为0000H——0FFFH），数据从P0口输入，引脚、和、的电平设置见表6，PSEB 为低电平，RST 保持高电平，EA/Vpp 引脚是编程电源的输入端，按要求加上编程电

压，ALE/PROG引脚输入编程脉冲（负脉冲）。编程时，可采用4—20MHz 的时钟振荡器，89C51 编程方法如下：在地址线上加上要编程单元的地址信号在数据线上加上要写入的数据字节。激活相应的控制信号。在高电压编程方式时，将EA/Vpp 端加上+12v 编程电压。每对Flash 存储阵列写入一个字节或每写入一个程序加密位，加上一个ALE/PROG 编程脉冲。改变编程单元的地址和写入的数据，重复1—5 步骤，知道全部文件编程结束。每个字节写入周期是自身定时的，通常约为。·数据查询89C51 单片机用数据查询方式来检测一个写周期是否结束，在一个写周期中，如需要读取最后写入的那个字节，则读出的数据的最高位（）是原来写入字节的最高位的反码。写周期开始后，可在任意时刻进行数据查询。

Busy

字节编程的进度可通过Ready/Busy 输出信号检测，编程期间，ALE 变为高电平“H”后（Ready/Busy）端被拉低，表示正在编程状态（忙状态）。编程完成后，变为高电平表示准备就绪状态。·程序校验：如果加密位LB、LB2 没有进行编程，则代码数据可通过地址和数据线读回原编写的数据，采用下图的电路，程序存储器的地址由P1 口和P2 口的—输入，数据由P0 口读出，P206、和、的控制信号见表6，PSEN 保持低电平，ALE、EA 和RST 保持高电平。校验时，P0 口必须接上10k 左右的上拉电阻。芯片擦除

利用控制信号的正确组合(表6)并保持ALE/PROG 引脚10ms 的低电平脉冲宽度即可将EPROM 阵列(4k 字节)和三个加密位整片擦除,代码阵列在片擦除操作中将任何非空单元写入”1”,这步骤需在编程之前进行。

读片内签名字节

89C51 单片机内有 3 个签名字节,地址为030H、031H 和032H。于声明该器件的厂商、号和编程电压。读签名字节的过程和单元030H、031H 和032H的正常校验相仿，只需要将和保持低电平，返回值意义如下：

(030H) = 1EH 声明产品由ATMEL 公司制造。

(031H) = 51H 声明为89C51 单片机。

(032H) = FFH 声明为12V 编程电压。

(032H) = 05H 声明为5 编程电压。

编程接口

采用控制信号的正确组合可对Flash 闪速存储阵列中的每一代码字节进行写入和存储器的整片擦除，写操作周期是自身定时的，初始化后它将自动定时到操作完成。微机接口实现两种信息形式的交换。在计算机之外，由电子系统所处理的信息以一种物理信号形式存在，但在程序中，它是用数字表示的。任一接口的功能都可分为以某种形式进行数据库变换的一些操作，所以外部和内部形式的转换是由

许多步骤完成的。模拟-数字转换器（ADC）用来将连续变化信号变成相应的数字量，这数字量可是可能性的二进制数值中的一固定值。如果传感器输出不是连续变化的，就不需模拟-数字转换。这种情况下，信号调理单元必须将输入信号变换成为另一信号，也可直接与接口的下一部分，即微计算机本身的输入输出单元相连接。输出接口采用相似的形式，明显的差别在于信息流的方向相反；是从程序到外部世界。这种情况下，程序可称为输出程序，它监督接口的操作并完成数字-模拟转换器（DAC）所需数字的标定。该子程序依次送出信息给输出器件，产生相应的电信号，由DAC 转换成模拟形式。最后，信号经调理（通常是放大）以形成适应于执行器操作的形式。在微机电路中使用的信号几乎总是太小而不能被直接地连到“外部世界”，因而必须用某种形式将其转换成更适宜的形式。接口电路部分的设计是使用微机的工程师所面临最重要的任务之一。我们已经了解到微机中，信号以离散的位形式表示。当微机要与只有打开或关闭操作的设备相连时，这种数字形式是最有用的，这里每一位都可表示一开关或执行器的状态。为了解决实际问题，一个单片机不仅包括CPU，程序和数据存储器，另外，它必须含有通过CPU 访问外部信息的硬件。一旦CPU 收集到数据信息和流程，它必须能够改变外部领域的一部分，这些硬件设备称作外围设备，它们是CPU 通往外部的窗口。

单片机可利用外围设备中最基本的用于一般用途的I/O 接口，每个I/O 接口既可作为输入端又可作为输出端，每个I/O 接口的功能取决与程序初始化阶段对数据方位寄存器相应位进行置一和清

零操作，通过CPU 指令对数据寄存器相应位进行置一和清零来置一和清零输出端口，同样输入端口逻辑位也可以通过CPU 指令访问。一些类型的串行口单元允许CPU 与外部设备进行串口通信，用串口位代替平行位进行通信需要少许的I/O 口，这样使通信费用降低但速度也相对慢些。串口传送可以同步也可以异步。

3 系统总体设计

该系统硬件包括微控制器，温度检测电路，键盘控制电路，时钟电路，显示，报警，驱动电路和外部RAM。基于AT89C51单片机，DS18B20的将温度信号传送到数字信号的检测。和信号发送到微控制器进行处理。最后，温度值显示在液晶12232F。这些步骤是用来实现温度检测。使用键盘接口芯片HD7279在设定温度值，使用微控制器保持一定的温度，并使用液晶显示的温度控制设定值。此外，时钟芯片DS1302用于显示时间和外部RAM6264是用来保存监测数据。报警将给予及时蜂鸣器如果温度超过了上限和下限温度值。

硬件设计

A. 微控制器在AT89C51单片机是一种低功耗，高性能CMOS8位4K的系统内可编程闪存字节微控制器。该设备是采用At mel的高密度非易失性内存技术，并与业界标准的80C51指令集和引脚兼容。片上闪存程序存储器可以编程就可以在系统或由传统的非易失性存储器编程。通过结合在系统灵活的8位CPU集成在一个芯片可编程闪存，Atmel的单片机AT89C51是一个功能强大的微控制器提供了一

个高度灵活的和具有成本效益的解决方案很多嵌入式控制应用。为了节省监测数据，6264是用来作为外部RAM。它是一个静态RAM芯片，低功耗具有8K字节的内存。

B. 温度检测电路

温度传感器是该系统的关键部分。达拉斯DS18B20的使用，它支持1 - Wire总线接口，板上专利是在内部使用。所有的传感器部分和转换电路集成在一个晶体管集成电路像[1]。其测量范围为-55℃?125℃，在-10℃?85℃精度为±℃[2，3]。由DS18B20的温度采集传输在1 - Wire总线的方式，这种高度提高了系统的抗干扰，使之适合在恶劣的环境现场温度测量[4]。有两个电源DS18B20的供应方式。首先是外部电源供给：DS18B20的第一脚连接到地面，第二引脚用作信号线，三是连接到电源。第二种方式是寄生电源[5]。由于寄生电源会导致硬件电路，软件控制的难度和芯片的性能下降等，但DS18B20的（s）的复杂性，可以连接到I/ O端口的单片机在外部电源供电方式，它更受欢迎。因此，外部电源供应使用，而第二个接脚连接到引脚可单片机AT89C51。其实，如果多有被检测，DS18B20的（S）可以连接到1 - Wire总线。但是，当数超过8，有一个向驾驶和更复杂的软件设计，以及1 - Wire总线长度的关注。一般而言，这是不超过50米。为了实现远程控制，该系统可在一个无线之一，旨在打破了1 - Wire总线长度的限制[6]。

C. LCD显示器电路